Searched refs:mmSMC_IND_DATA_0 (Results 1 - 11 of 11) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_kv_smc.c106 *value = RREG32(mmSMC_IND_DATA_0);
147 original_data = RREG32(mmSMC_IND_DATA_0);
173 WREG32(mmSMC_IND_DATA_0, data);
186 WREG32(mmSMC_IND_DATA_0, data);
201 original_data = RREG32(mmSMC_IND_DATA_0);
219 WREG32(mmSMC_IND_DATA_0, data);
H A Damdgpu_cik.c115 r = RREG32(mmSMC_IND_DATA_0);
126 WREG32(mmSMC_IND_DATA_0, (v));
964 WREG32(mmSMC_IND_DATA_0, 0);
968 dw_ptr[i] = RREG32(mmSMC_IND_DATA_0);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_d.h133 #define mmSMC_IND_DATA_0 0x0081 macro
H A Dsmu_7_0_0_d.h76 #define mmSMC_IND_DATA_0 0x81 macro
H A Dsmu_7_1_3_d.h81 #define mmSMC_IND_DATA_0 0x81 macro
H A Dsmu_7_1_2_d.h78 #define mmSMC_IND_DATA_0 0x81 macro
H A Dsmu_7_1_0_d.h77 #define mmSMC_IND_DATA_0 0x81 macro
H A Dsmu_7_0_1_d.h78 #define mmSMC_IND_DATA_0 0x81 macro
H A Dsmu_7_1_1_d.h77 #define mmSMC_IND_DATA_0 0x81 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_ci_smumgr.c139 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data);
156 original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0);
175 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data);
209 *value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0);
2341 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data);
H A Damdgpu_iceland_smumgr.c176 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data);

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