Searched refs:mmRLC_SERDES_WR_CTRL (Results 1 - 11 of 11) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v6_0.c2586 WREG32(mmRLC_SERDES_WR_CTRL, 0x00b000ff);
2591 WREG32(mmRLC_SERDES_WR_CTRL, 0x007000ff);
2637 WREG32(mmRLC_SERDES_WR_CTRL, 0x00d000ff);
2660 WREG32(mmRLC_SERDES_WR_CTRL, 0x00e000ff);
H A Damdgpu_gfx_v7_0.c3599 WREG32(mmRLC_SERDES_WR_CTRL, tmp2);
3652 WREG32(mmRLC_SERDES_WR_CTRL, data);
3702 WREG32(mmRLC_SERDES_WR_CTRL, data);
H A Damdgpu_gfx_v8_0.c5507 data = RREG32(mmRLC_SERDES_WR_CTRL);
5535 WREG32(mmRLC_SERDES_WR_CTRL, data);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1173 #define mmRLC_SERDES_WR_CTRL 0x3117 macro
H A Dgfx_7_2_d.h1318 #define mmRLC_SERDES_WR_CTRL 0x311f macro
H A Dgfx_7_0_d.h1305 #define mmRLC_SERDES_WR_CTRL 0x311f macro
H A Dgfx_8_1_d.h1416 #define mmRLC_SERDES_WR_CTRL 0xec5f macro
H A Dgfx_8_0_d.h1418 #define mmRLC_SERDES_WR_CTRL 0xec5f macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6082 #define mmRLC_SERDES_WR_CTRL 0x4c5f macro
H A Dgc_9_1_offset.h6304 #define mmRLC_SERDES_WR_CTRL 0x4c5f macro
H A Dgc_9_2_1_offset.h6282 #define mmRLC_SERDES_WR_CTRL 0x4c5f macro

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