Searched refs:mmREMAP_HDP_REG_FLUSH_CNTL (Results 1 - 10 of 10) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_nbio_v2_3.c46 WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL,
H A Damdgpu_nbio_v7_0.c45 WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL,
H A Damdgpu_nbio_v7_4.c67 WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL,
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h913 #define mmREMAP_HDP_REG_FLUSH_CNTL 0x0e4e // duplicate macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_d.h156 #define mmREMAP_HDP_REG_FLUSH_CNTL 0x1427 macro
H A Dbif_5_1_d.h164 #define mmREMAP_HDP_REG_FLUSH_CNTL 0x1427 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_offset.h2854 #define mmREMAP_HDP_REG_FLUSH_CNTL 0x012e macro
H A Dnbio_6_1_offset.h2550 #define mmREMAP_HDP_REG_FLUSH_CNTL 0x012e macro
H A Dnbio_7_0_offset.h4432 #define mmREMAP_HDP_REG_FLUSH_CNTL 0x012e macro
H A Dnbio_2_3_offset.h526 #define mmREMAP_HDP_REG_FLUSH_CNTL 0x012e macro
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