Searched refs:mmPA_SC_RASTER_CONFIG (Results 1 - 16 of 16) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_mxgpu_vi.c131 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x3a00161a,
274 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x16000012,
H A Damdgpu_si.c79 mmPA_SC_RASTER_CONFIG, 0x3f3f3fff, 0x2a00126a,
135 mmPA_SC_RASTER_CONFIG, 0x3f3f3fff, 0x2a00126a,
318 mmPA_SC_RASTER_CONFIG, 0x3f3f3fff, 0x0000124a,
356 mmPA_SC_RASTER_CONFIG, 0x3f3f3fff, 0x00000082,
405 mmPA_SC_RASTER_CONFIG, 0x3f3f3fff, 0x00000000,
1049 case mmPA_SC_RASTER_CONFIG:
H A Damdgpu_gfx_v8_0.c227 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x16000012,
323 mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x3a00161a,
354 mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x16000012,
386 mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x16000012,
401 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x16000012,
413 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x3a00161a,
486 mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x00000002,
501 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x00000002,
597 mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x00000002,
702 mmPA_SC_RASTER_CONFIG,
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H A Damdgpu_vi.c554 {mmPA_SC_RASTER_CONFIG, true},
572 case mmPA_SC_RASTER_CONFIG:
H A Damdgpu_gfx_v6_0.c1461 WREG32(mmPA_SC_RASTER_CONFIG, raster_config_se);
1500 WREG32(mmPA_SC_RASTER_CONFIG, raster_config);
1515 RREG32(mmPA_SC_RASTER_CONFIG);
2915 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);
H A Damdgpu_gfx_v7_0.c1778 WREG32(mmPA_SC_RASTER_CONFIG, raster_config_se);
1826 WREG32(mmPA_SC_RASTER_CONFIG, raster_config);
1843 RREG32(mmPA_SC_RASTER_CONFIG);
2578 amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);
4010 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);
H A Damdgpu_cik.c1048 {mmPA_SC_RASTER_CONFIG, true},
1067 case mmPA_SC_RASTER_CONFIG:
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1005 #define mmPA_SC_RASTER_CONFIG 0xA0D4 macro
H A Dgfx_7_2_d.h1034 #define mmPA_SC_RASTER_CONFIG 0xa0d4 macro
H A Dgfx_7_0_d.h1021 #define mmPA_SC_RASTER_CONFIG 0xa0d4 macro
H A Dgfx_8_1_d.h1117 #define mmPA_SC_RASTER_CONFIG 0xa0d4 macro
H A Dgfx_8_0_d.h1116 #define mmPA_SC_RASTER_CONFIG 0xa0d4 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3578 #define mmPA_SC_RASTER_CONFIG 0x00d4 macro
H A Dgc_9_1_offset.h3808 #define mmPA_SC_RASTER_CONFIG 0x00d4 macro
H A Dgc_9_2_1_offset.h3758 #define mmPA_SC_RASTER_CONFIG 0x00d4 macro
H A Dgc_10_1_0_offset.h5950 #define mmPA_SC_RASTER_CONFIG 0x00d4 macro
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