Searched refs:mmMP0_DISP_TIMER1_INTEN (Results 1 - 1 of 1) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_d.h248 #define mmMP0_DISP_TIMER1_INTEN 0x1b5 macro

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