Searched refs:mmMCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_d.h776 #define mmMCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL 0x5e78 macro
H A Dgmc_8_1_d.h1574 #define mmMCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL 0x5e78 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h1402 #define mmMCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL 0x02b2 macro
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H A Ddcn_2_1_0_offset.h954 #define mmMCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL 0x02b2 macro
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H A Ddcn_2_0_0_offset.h992 #define mmMCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL 0x02b2 macro
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h238 #define mmMCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL 0x0272 macro
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