Searched refs:mmIH_RB_BASE (Results 1 - 14 of 14) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_cik_ih.c | 131 WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8);
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| H A D | amdgpu_iceland_ih.c | 132 WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8);
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| H A D | amdgpu_cz_ih.c | 132 WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8);
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| H A D | amdgpu_tonga_ih.c | 128 WREG32(mmIH_RB_BASE, ih->gpu_addr >> 8);
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| H A D | amdgpu_navi10_ih.c | 127 WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE, ih->gpu_addr >> 8);
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| H A D | amdgpu_vega10_ih.c | 238 WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE, ih->gpu_addr >> 8);
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/ |
| H A D | oss_1_0_d.h | 232 #define mmIH_RB_BASE 0x0F81 macro
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| H A D | osssys_4_0_1_offset.h | 124 #define mmIH_RB_BASE 0x0081 macro
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| H A D | osssys_4_0_offset.h | 124 #define mmIH_RB_BASE 0x0081 macro
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| H A D | osssys_5_0_0_offset.h | 124 #define mmIH_RB_BASE 0x0081 macro
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| H A D | oss_2_4_d.h | 46 #define mmIH_RB_BASE 0xe31 macro
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| H A D | oss_2_0_d.h | 46 #define mmIH_RB_BASE 0xf81 macro
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| H A D | oss_3_0_1_d.h | 46 #define mmIH_RB_BASE 0xe31 macro
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| H A D | oss_3_0_d.h | 46 #define mmIH_RB_BASE 0xe31 macro
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