Searched refs:mmHDP_REG_COHERENCY_FLUSH_CNTL (Results 1 - 10 of 10) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_d.h631 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x1528 macro
H A Dbif_4_1_d.h52 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x1528 macro
H A Dbif_5_0_d.h60 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x1528 macro
H A Dbif_5_1_d.h52 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x1528 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gmc_v6_0.c252 WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0);
H A Damdgpu_gmc_v7_0.c278 WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0);
H A Damdgpu_gmc_v8_0.c469 WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h1125 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x0e16 // duplicate macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_offset.h2904 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x00f6 macro
H A Dnbio_7_0_offset.h4476 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x00f6 macro

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