Searched refs:mmDF_CS_UMC_AON0_DramBaseAddress0 (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/df/
H A Ddf_3_6_offset.h35 #define mmDF_CS_UMC_AON0_DramBaseAddress0 0x0044 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_df_v3_6.c353 tmp = RREG32_SOC15(DF, 0, mmDF_CS_UMC_AON0_DramBaseAddress0);

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