Searched refs:mmBIF_VDDGFX_GFX5_UPPER_BASE_IDX (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h884 #define mmBIF_VDDGFX_GFX5_UPPER_BASE_IDX 0 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h2521 #define mmBIF_VDDGFX_GFX5_UPPER_BASE_IDX 2 macro
H A Dnbio_7_0_offset.h4403 #define mmBIF_VDDGFX_GFX5_UPPER_BASE_IDX 2 macro

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