Searched refs:mmBIF_SDMA0_DOORBELL_RANGE (Results 1 - 9 of 9) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_nbio_v7_4.c111 SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE);
122 SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE);
H A Damdgpu_nbio_v2_3.c88 u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
H A Damdgpu_nbio_v6_1.c78 u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
H A Damdgpu_nbio_v7_0.c85 u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h365 #define mmBIF_SDMA0_DOORBELL_RANGE 0x4f0af0 // duplicate macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_offset.h2954 #define mmBIF_SDMA0_DOORBELL_RANGE 0x01d0 macro
H A Dnbio_6_1_offset.h2640 #define mmBIF_SDMA0_DOORBELL_RANGE 0x01d0 macro
H A Dnbio_7_0_offset.h4522 #define mmBIF_SDMA0_DOORBELL_RANGE 0x01d0 macro
H A Dnbio_2_3_offset.h650 #define mmBIF_SDMA0_DOORBELL_RANGE 0x01d0 macro
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