Searched refs:ixSYSHUB_MMREG_IND_DMA_CLK1_SW0_CL2_CNTL (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h3629 #define ixSYSHUB_MMREG_IND_DMA_CLK1_SW0_CL2_CNTL 0x11020 macro
H A Dnbio_7_0_offset.h4610 #define ixSYSHUB_MMREG_IND_DMA_CLK1_SW0_CL2_CNTL 0x11020 macro

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