Searched refs:ixSMU_STATUS (Results 1 - 10 of 10) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_d.h158 #define ixSMU_STATUS 0xe0003088 macro
H A Dsmu_7_1_3_d.h200 #define ixSMU_STATUS 0xe0003088 macro
H A Dsmu_7_1_2_d.h197 #define ixSMU_STATUS 0xe0003088 macro
H A Dsmu_7_1_0_d.h176 #define ixSMU_STATUS 0xe0003088 macro
H A Dsmu_7_0_1_d.h177 #define ixSMU_STATUS 0xe0003088 macro
H A Dsmu_7_1_1_d.h195 #define ixSMU_STATUS 0xe0003088 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_fiji_smumgr.c121 ixSMU_STATUS, 0);
H A Damdgpu_vegam_smumgr.c121 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_STATUS, 0);
H A Damdgpu_polaris10_smumgr.c220 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_STATUS, 0);
H A Damdgpu_tonga_smumgr.c116 ixSMU_STATUS, 0);

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