Searched refs:ixLCAC_MC0_OVR_VAL (Results 1 - 9 of 9) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_d.h30 #define ixLCAC_MC0_OVR_VAL 0x011E macro
H A Dsmu_8_0_d.h636 #define ixLCAC_MC0_OVR_VAL 0xd0208138 macro
H A Dsmu_7_0_0_d.h729 #define ixLCAC_MC0_OVR_VAL 0xc0400d38 macro
H A Dsmu_7_1_3_d.h1112 #define ixLCAC_MC0_OVR_VAL 0xc0400138 macro
H A Dsmu_7_1_2_d.h1180 #define ixLCAC_MC0_OVR_VAL 0xc0400138 macro
H A Dsmu_7_1_0_d.h1248 #define ixLCAC_MC0_OVR_VAL 0xc0400d38 macro
H A Dsmu_7_0_1_d.h1219 #define ixLCAC_MC0_OVR_VAL 0xc0400d38 macro
H A Dsmu_7_1_1_d.h1029 #define ixLCAC_MC0_OVR_VAL 0xc0400138 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_kv_dpm.c544 WREG32_SMC(ixLCAC_MC0_OVR_VAL, 0);

Completed in 366 milliseconds