Searched refs:ixLCAC_MC0_CNTL (Results 1 - 9 of 9) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_d.h28 #define ixLCAC_MC0_CNTL 0x011C macro
H A Dsmu_8_0_d.h634 #define ixLCAC_MC0_CNTL 0xd0208130 macro
H A Dsmu_7_0_0_d.h727 #define ixLCAC_MC0_CNTL 0xc0400d30 macro
H A Dsmu_7_1_3_d.h1110 #define ixLCAC_MC0_CNTL 0xc0400130 macro
H A Dsmu_7_1_2_d.h1178 #define ixLCAC_MC0_CNTL 0xc0400130 macro
H A Dsmu_7_1_0_d.h1246 #define ixLCAC_MC0_CNTL 0xc0400d30 macro
H A Dsmu_7_0_1_d.h1217 #define ixLCAC_MC0_CNTL 0xc0400d30 macro
H A Dsmu_7_1_1_d.h1027 #define ixLCAC_MC0_CNTL 0xc0400130 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_smu7_hwmgr.c1129 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC0_CNTL, 0x5);
1134 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC0_CNTL, 0x400009);
1137 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC0_CNTL, 0x400005);

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