Searched refs:ixLCAC_CPL_OVR_SEL (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_d.h647 #define ixLCAC_CPL_OVR_SEL 0xd0208164 macro
H A Dsmu_7_0_0_d.h740 #define ixLCAC_CPL_OVR_SEL 0xc0400d84 macro
H A Dsmu_7_1_3_d.h1135 #define ixLCAC_CPL_OVR_SEL 0xc0400164 macro
H A Dsmu_7_1_2_d.h1191 #define ixLCAC_CPL_OVR_SEL 0xc0400164 macro
H A Dsmu_7_1_0_d.h1259 #define ixLCAC_CPL_OVR_SEL 0xc0400d84 macro
H A Dsmu_7_0_1_d.h1230 #define ixLCAC_CPL_OVR_SEL 0xc0400d84 macro
H A Dsmu_7_1_1_d.h1040 #define ixLCAC_CPL_OVR_SEL 0xc0400164 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_kv_dpm.c559 WREG32_SMC(ixLCAC_CPL_OVR_SEL, 0);

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