Searched refs:_reg_write_2 (Results 1 - 25 of 28) sorted by relevance

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/netbsd-current/sys/arch/evbsh3/t_sh7706lan/
H A Dt_sh7706lan.c47 _reg_write_2(SH7709_PHCR, 0x2800);
52 _reg_write_2(SH7709_SCPCR, reg);
55 _reg_write_2(SH7709_ICR1, 0x0aaa);
61 _reg_write_2(SH3_BCR2, reg);
H A Dscimci.c118 _reg_write_2((reg), _r); \
134 _reg_write_2((reg), _r); \
H A Dssumci.c120 _reg_write_2((reg), _r); \
136 _reg_write_2((reg), _r); \
/netbsd-current/sys/arch/evbsh3/ap_ms104_sh4/
H A Dap_ms104_sh4.c63 _reg_write_2(SH4_GPIOIC, 0);
64 _reg_write_2(SH4_PDTRA, 0);
66 _reg_write_2(SH4_PDTRB, 0);
73 _reg_write_2(SH4_PDTRA, (1 << GPIO_PIN_CARD_PON)
107 _reg_write_2(SH4_GPIOIC, reg);
129 _reg_write_2(SH4_GPIOIC, reg);
158 _reg_write_2(SH4_GPIOIC, r);
H A Drs5c316_mainbus.c125 _reg_write_2(SH4_PDTRA, reg);
140 _reg_write_2(SH4_PDTRA, reg);
182 _reg_write_2(SH4_PDTRA, reg);
H A Dshpcmcia.c815 _reg_write_2(SH4_PDTRA, reg);
824 _reg_write_2(SH4_PDTRA, reg);
829 _reg_write_2(SH4_PDTRA, reg);
844 _reg_write_2(SH4_PDTRA, reg);
849 _reg_write_2(SH4_PDTRA, reg);
854 _reg_write_2(SH4_PDTRA, reg);
/netbsd-current/sys/arch/playstation2/dev/
H A Dsbus.c255 _reg_write_2(SBUS_PCMCIA_CSC1_REG16, 0xffff);
262 _reg_write_2(SBUS_PCMCIA_TIMR_REG16, 0);
269 _reg_write_2(SBUS_PCMCIA_TIMR_REG16, 1);
277 _reg_write_2(SBUS_PCMCIA_TIMR_REG16, 1);
278 _reg_write_2(SBUS_PCMCIA_TIMR_REG16, r);
292 _reg_write_2(SBUS_PCMCIA3_TIMR_REG16, 0);
299 _reg_write_2(SBUS_PCMCIA3_TIMR_REG16, 1);
307 _reg_write_2(SBUS_PCMCIA3_TIMR_REG16, 1);
308 _reg_write_2(SBUS_PCMCIA3_TIMR_REG16, r);
H A Dif_smap.c176 _reg_write_2(SPD_INTR_ENABLE_REG16, r);
180 _reg_write_2(SPD_INTR_CLEAR_REG16, SPD_INTR_RXEND | SPD_INTR_TXEND |
280 _reg_write_2(SPD_INTR_ENABLE_REG16, r);
289 _reg_write_2(SPD_INTR_CLEAR_REG16, disable);
293 _reg_write_2(SPD_INTR_CLEAR_REG16, SPD_INTR_TXEND);
300 _reg_write_2(SPD_INTR_CLEAR_REG16, SPD_INTR_RXEND);
352 _reg_write_2(SMAP_RXFIFO_PTR_REG16, d->ptr & 0x3ffc);
400 _reg_write_2(SPD_INTR_ENABLE_REG16, r16);
504 _reg_write_2(SMAP_TXFIFO_PTR_REG16, fifop);
531 _reg_write_2(SPD_INTR_ENABLE_REG1
[all...]
H A Dspd.c107 _reg_write_2(SPD_INTR_ENABLE_REG16, 0);
108 _reg_write_2(SPD_INTR_CLEAR_REG16, _reg_read_2(SPD_INTR_STATUS_REG16));
152 _reg_write_2(SPD_INTR_ENABLE_REG16, 0);
153 _reg_write_2(SPD_INTR_ENABLE_REG16, r);
H A Dwdc_spd.c238 _reg_write_2(SPD_INTR_ENABLE_REG16, r);
248 _reg_write_2(SPD_INTR_ENABLE_REG16, r);
H A Demac3.c89 _reg_write_2(a_, (v >> 16) & 0xffff);
90 _reg_write_2(a_ + 2, v & 0xffff);
/netbsd-current/sys/arch/sh3/sh3/
H A Dclock.c119 _reg_write_2(SH_(TCR0), 0);
120 _reg_write_2(SH_(TCR1), 0);
121 _reg_write_2(SH_(TCR2), 0);
134 _reg_write_2(SH_(TCR0), TCR_TPSC_P16);
138 _reg_write_2(SH_(TCR0),
168 _reg_write_2(SH_(TCR1), TCR_TPSC_P4);
247 _reg_write_2(SH_(TCR0), TCR_UNIE | TCR_TPSC_P16);
250 _reg_write_2(SH_(TCR0), TCR_UNIE |
267 _reg_write_2(SH_(TCR1), TCR_UNIE | TCR_TPSC_P4);
273 _reg_write_2(SH
[all...]
H A Dinterrupt.c77 _reg_write_2(SH7709_IPRC, 0);
78 _reg_write_2(SH7709_IPRD, 0);
79 _reg_write_2(SH7709_IPRE, 0);
84 _reg_write_2(SH3_IPRA, 0);
85 _reg_write_2(SH3_IPRB, 0);
97 _reg_write_2(SH4_IPRD, 0);
100 _reg_write_2(SH4_IPRA, 0);
101 _reg_write_2(SH4_IPRB, 0);
102 _reg_write_2(SH4_IPRC, 0);
356 _reg_write_2(iprre
[all...]
H A Dsh3_machdep.c195 _reg_write_2(SH_(BBRA), 0); /* disable channel A */
196 _reg_write_2(SH_(BBRB), 0); /* disable channel B */
212 _reg_write_2(SH4_BRCR, UBC_CTL_A_AFTER_INSN);
/netbsd-current/sys/arch/evbsh3/evbsh3/
H A Dmachdep.c366 _reg_write_2(SH3_BCR1, BSC_BCR1_VAL);
378 _reg_write_2(SH_(BCR2), BSC_BCR2_VAL);
386 _reg_write_2(SH3_WCR1, BSC_WCR1_VAL);
401 _reg_write_2(SH3_WCR2, BSC_WCR2_VAL);
418 _reg_write_2(SH3_MCR, BSC_MCR_VAL);
431 _reg_write_2(0x1a000000, 0); /* ADDSET */
433 _reg_write_2(0x18000000, 0); /* ADDRST */
443 _reg_write_2(SH_(PCR), BSC_PCR_VAL);
453 _reg_write_2(SH_(RTCSR), BSC_RTCSR_VAL);
460 _reg_write_2(SH
[all...]
/netbsd-current/sys/arch/hpc/stand/hpcboot/sh3/dev/
H A Dsh4_dev.cpp113 _reg_write_2(SH4_IPRA, 0);
114 _reg_write_2(SH4_IPRB, 0);
115 _reg_write_2(SH4_IPRC, 0);
116 // _reg_write_2(SH4_IPRD, 0); SH7709S only.
170 _reg_write_2(a, ~_reg_read_2(a) & 0xffff);
/netbsd-current/sys/arch/mmeye/stand/boot/
H A Dclock.c41 _reg_write_2(SH_(TCR0), TCR_TPSC_P4);
/netbsd-current/sys/arch/hpcsh/dev/
H A Dpfckbd.c310 _reg_write_2(SH7709_PDCR, dc | scan[column].dc);
311 _reg_write_2(SH7709_PECR, ec | scan[column].ec);
331 _reg_write_2(SH7709_PDCR, dc | (0x5555 & PFCKBD_HP_PDCR_MASK));
332 _reg_write_2(SH7709_PECR, ec | (0x5555 & PFCKBD_HP_PECR_MASK));
408 _reg_write_2(SH7709_PCCR, cc | scan[i].cc);
409 _reg_write_2(SH7709_PDCR, dc | scan[i].dc);
410 _reg_write_2(SH7709_PECR, ec | scan[i].ec);
433 _reg_write_2(SH7709_PCCR, cc | (0x5555 & PFCKBD_HITACHI_PCCR_MASK));
434 _reg_write_2(SH7709_PDCR, dc | (0x5555 & PFCKBD_HITACHI_PDCR_MASK));
435 _reg_write_2(SH7709_PEC
[all...]
/netbsd-current/sys/arch/landisk/landisk/
H A Dmachdep.c404 _reg_write_2(SH4_BCR2, BSC_BCR2_VAL);
409 _reg_write_2(SH4_BCR3, BSC_BCR3_VAL);
462 _reg_write_2(SH4_PCR, BSC_PCR_VAL);
472 _reg_write_2(SH4_RTCSR, BSC_RTCSR_VAL);
479 _reg_write_2(SH4_RTCNT, BSC_RTCNT_VAL);
483 _reg_write_2(SH4_RTCOR, BSC_RTCOR_VAL);
487 _reg_write_2(SH4_RFCR, BSC_RFCR_VAL);
494 _reg_write_2(SH4_FRQCR, FRQCR_VAL);
/netbsd-current/sys/arch/mmeye/mmeye/
H A Dmachdep.c369 _reg_write_2(SH3_BCR1, 0x1010);
378 _reg_write_2(SH3_BCR1, 0x1013);
390 _reg_write_2(SH3_BCR2, 0x2af4);
399 _reg_write_2(SH3_BCR2, 0x16f4);
406 _reg_write_2(SH3_WCR1, 0x3fff);
417 _reg_write_2(SH3_WCR2, 0x4bdd);
428 _reg_write_2(SH3_WCR2, 0xabfd);
438 _reg_write_2(SH3_MCR, 0x6135);
442 _reg_write_2(SH3_DCR, 0x0000);
449 _reg_write_2(SH3_PC
[all...]
/netbsd-current/sys/arch/playstation2/ee/
H A Deevar.h47 #define _reg_write_2(a, v) __write_2(a, v) macro
/netbsd-current/sys/arch/sh3/include/
H A Ddevreg.h43 #define _reg_write_2(a, v) \ macro
/netbsd-current/sys/arch/landisk/stand/boot/
H A Ddelay.c99 _reg_write_2(TCR, TCR_TPSC);
/netbsd-current/sys/arch/hpc/stand/hpcboot/
H A Dhpcboot.h128 #define _reg_write_2(a, v) (*(volatile uint16_t *)(a) = (v)) macro
/netbsd-current/sys/arch/sh3/dev/
H A Drtc.c244 _reg_write_2(SH4_RYRCNT, year);

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