Searched refs:ZSWR0_CLR_INTR (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/dev/ic/
H A Dz8530sc.c337 zs_write_csr(cs0, ZSWR0_CLR_INTR);
351 zs_write_csr(cs1, ZSWR0_CLR_INTR);
H A Dz8530reg.h138 #define ZSWR0_CLR_INTR ZSM_RESET_IUS macro
/netbsd-current/sys/arch/atari/dev/
H A Dzs.c669 zc->zc_csr = ZSWR0_CLR_INTR;
681 zc->zc_csr = ZSWR0_CLR_INTR;
686 zc->zc_csr = ZSWR0_CLR_INTR;
697 zc->zc_csr = ZSWR0_CLR_INTR;
/netbsd-current/sys/arch/mac68k/dev/
H A Dzs.c915 sccA[2] = ZSWR0_CLR_INTR; unit = sccA[2]; /* reset any pending ints. */
916 sccA[0] = ZSWR0_CLR_INTR; unit = sccA[0];

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