Searched refs:XCONCAT2 (Results 1 - 25 of 218) sorted by relevance

123456789

/netbsd-current/external/gpl3/gdb/dist/gdb/testsuite/gdb.perf/
H A Dgm-use-cerr.cc20 #define WRITE_CERR XCONCAT2 (write_cerr_, SHLIB)
H A Dgm-utils.h21 #define XCONCAT2(a,b) CONCAT2 (a, b) macro
/netbsd-current/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.perf/
H A Dgm-use-cerr.cc20 #define WRITE_CERR XCONCAT2 (write_cerr_, SHLIB)
H A Dgm-utils.h21 #define XCONCAT2(a,b) CONCAT2 (a, b) macro
/netbsd-current/external/gpl3/gdb.old/dist/sim/ppc/
H A Dsim-endian-n.h26 #define unsigned_N XCONCAT2(unsigned_,N)
27 #define endian_t2h_N XCONCAT2(endian_t2h_,N)
28 #define endian_h2t_N XCONCAT2(endian_h2t_,N)
29 #define _SWAP_N XCONCAT2(_SWAP_,N)
30 #define swap_N XCONCAT2(swap_,N)
31 #define endian_h2be_N XCONCAT2(endian_h2be_,N)
32 #define endian_be2h_N XCONCAT2(endian_be2h_,N)
33 #define endian_h2le_N XCONCAT2(endian_h2le_,N)
34 #define endian_le2h_N XCONCAT2(endian_le2h_,N)
H A Dcorefile-n.h26 #define unsigned_N XCONCAT2(unsigned_,N)
27 #define T2H_N XCONCAT2(T2H_,N)
28 #define H2T_N XCONCAT2(H2T_,N)
30 #define core_map_read_N XCONCAT2(core_map_read_,N)
31 #define core_map_write_N XCONCAT2(core_map_write_,N)
H A Dvm_n.h26 #define unsigned_N XCONCAT2(unsigned_,N)
27 #define T2H_N XCONCAT2(T2H_,N)
28 #define H2T_N XCONCAT2(H2T_,N)
29 #define vm_data_map_read_N XCONCAT2(vm_data_map_read_,N)
30 #define vm_data_map_write_N XCONCAT2(vm_data_map_write_,N)
45 val = XCONCAT2(core_map_read_,N)(map->read, ra, processor, cia);
94 XCONCAT2(core_map_write_,N)(map->write, ra, val, processor, cia);
/netbsd-current/external/gpl3/gdb/dist/sim/common/
H A Dsim-n-endian.h30 #define unsigned_N XCONCAT2(unsigned_,N)
31 #define endian_t2h_N XCONCAT2(endian_t2h_,N)
32 #define endian_h2t_N XCONCAT2(endian_h2t_,N)
33 #define _SWAP_N XCONCAT2(_SWAP_,N)
34 #define swap_N XCONCAT2(swap_,N)
35 #define endian_h2be_N XCONCAT2(endian_h2be_,N)
36 #define endian_be2h_N XCONCAT2(endian_be2h_,N)
37 #define endian_h2le_N XCONCAT2(endian_h2le_,N)
38 #define endian_le2h_N XCONCAT2(endian_le2h_,N)
39 #define offset_N XCONCAT2(offset
[all...]
H A Dcgen-mem.h39 extern mode XCONCAT2 (GETMEM,mode) (SIM_CPU *, IADDR, ADDR);
45 XCONCAT2 (GETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a) \
47 PROFILE_COUNT_READ (cpu, a, XCONCAT2 (MODE_,mode)); \
49 return XCONCAT2 (sim_core_read_unaligned_,size) (cpu, pc, read_map, a); \
71 extern void XCONCAT2 (SETMEM,mode) (SIM_CPU *, IADDR, ADDR, mode);
77 XCONCAT2 (SETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a, mode val) \
79 PROFILE_COUNT_WRITE (cpu, a, XCONCAT2 (MODE_,mode)); \
81 XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
103 extern mode XCONCAT2 (GETIMEM,mode) (SIM_CPU *, ADDR);
109 XCONCAT2 (GETIME
[all...]
H A Dsim-n-bits.h39 #define LSMASKn XCONCAT2(LSMASK,N)
40 #define MSMASKn XCONCAT2(MSMASK,N)
41 #define LSMASKEDn XCONCAT2(LSMASKED,N)
42 #define MSMASKEDn XCONCAT2(MSMASKED,N)
43 #define LSEXTRACTEDn XCONCAT2(LSEXTRACTED,N)
44 #define MSEXTRACTEDn XCONCAT2(MSEXTRACTED,N)
45 #define LSINSERTEDn XCONCAT2(LSINSERTED,N)
46 #define MSINSERTEDn XCONCAT2(MSINSERTED,N)
47 #define ROTn XCONCAT2(ROT,N)
48 #define ROTLn XCONCAT2(ROT
[all...]
H A Dsim-close.c44 # define cgen_cpu_close XCONCAT2 (CGEN_ARCH,_cgen_cpu_close)
H A Dsim-core.h298 #define sim_core_write_unaligned_word XCONCAT2(sim_core_write_unaligned_,WITH_TARGET_WORD_BITSIZE)
299 #define sim_core_write_aligned_word XCONCAT2(sim_core_write_aligned_,WITH_TARGET_WORD_BITSIZE)
300 #define sim_core_write_word XCONCAT2(sim_core_write_,WITH_TARGET_WORD_BITSIZE)
337 #define sim_core_read_unaligned_word XCONCAT2(sim_core_read_unaligned_,WITH_TARGET_WORD_BITSIZE)
338 #define sim_core_read_aligned_word XCONCAT2(sim_core_read_aligned_,WITH_TARGET_WORD_BITSIZE)
339 #define sim_core_read_word XCONCAT2(sim_core_read_,WITH_TARGET_WORD_BITSIZE)
H A Dsim-n-core.h42 #define unsigned_M XCONCAT2(unsigned_,M)
44 #define T2H_M XCONCAT2(T2H_,M)
45 #define H2T_M XCONCAT2(H2T_,M)
46 #define SWAP_M XCONCAT2(SWAP_,M)
48 #define sim_core_read_aligned_N XCONCAT2(sim_core_read_aligned_,N)
49 #define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N)
50 #define sim_core_read_misaligned_N XCONCAT2(sim_core_read_misaligned_,N)
51 #define sim_core_write_aligned_N XCONCAT2(sim_core_write_aligned_,N)
52 #define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N)
53 #define sim_core_write_misaligned_N XCONCAT2(sim_core_write_misaligned
[all...]
/netbsd-current/external/gpl3/gdb.old/dist/sim/common/
H A Dsim-n-endian.h30 #define unsigned_N XCONCAT2(unsigned_,N)
31 #define endian_t2h_N XCONCAT2(endian_t2h_,N)
32 #define endian_h2t_N XCONCAT2(endian_h2t_,N)
33 #define _SWAP_N XCONCAT2(_SWAP_,N)
34 #define swap_N XCONCAT2(swap_,N)
35 #define endian_h2be_N XCONCAT2(endian_h2be_,N)
36 #define endian_be2h_N XCONCAT2(endian_be2h_,N)
37 #define endian_h2le_N XCONCAT2(endian_h2le_,N)
38 #define endian_le2h_N XCONCAT2(endian_le2h_,N)
39 #define offset_N XCONCAT2(offset
[all...]
H A Dcgen-mem.h37 extern mode XCONCAT2 (GETMEM,mode) (SIM_CPU *, IADDR, ADDR);
43 XCONCAT2 (GETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a) \
45 PROFILE_COUNT_READ (cpu, a, XCONCAT2 (MODE_,mode)); \
47 return XCONCAT2 (sim_core_read_unaligned_,size) (cpu, pc, read_map, a); \
69 extern void XCONCAT2 (SETMEM,mode) (SIM_CPU *, IADDR, ADDR, mode);
75 XCONCAT2 (SETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a, mode val) \
77 PROFILE_COUNT_WRITE (cpu, a, XCONCAT2 (MODE_,mode)); \
79 XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
101 extern mode XCONCAT2 (GETIMEM,mode) (SIM_CPU *, ADDR);
107 XCONCAT2 (GETIME
[all...]
H A Dsim-n-bits.h39 #define LSMASKn XCONCAT2(LSMASK,N)
40 #define MSMASKn XCONCAT2(MSMASK,N)
41 #define LSMASKEDn XCONCAT2(LSMASKED,N)
42 #define MSMASKEDn XCONCAT2(MSMASKED,N)
43 #define LSEXTRACTEDn XCONCAT2(LSEXTRACTED,N)
44 #define MSEXTRACTEDn XCONCAT2(MSEXTRACTED,N)
45 #define LSINSERTEDn XCONCAT2(LSINSERTED,N)
46 #define MSINSERTEDn XCONCAT2(MSINSERTED,N)
47 #define ROTn XCONCAT2(ROT,N)
48 #define ROTLn XCONCAT2(ROT
[all...]
H A Dsim-close.c42 # define cgen_cpu_close XCONCAT2 (CGEN_ARCH,_cgen_cpu_close)
H A Dsim-core.h297 #define sim_core_write_unaligned_word XCONCAT2(sim_core_write_unaligned_,WITH_TARGET_WORD_BITSIZE)
298 #define sim_core_write_aligned_word XCONCAT2(sim_core_write_aligned_,WITH_TARGET_WORD_BITSIZE)
299 #define sim_core_write_word XCONCAT2(sim_core_write_,WITH_TARGET_WORD_BITSIZE)
336 #define sim_core_read_unaligned_word XCONCAT2(sim_core_read_unaligned_,WITH_TARGET_WORD_BITSIZE)
337 #define sim_core_read_aligned_word XCONCAT2(sim_core_read_aligned_,WITH_TARGET_WORD_BITSIZE)
338 #define sim_core_read_word XCONCAT2(sim_core_read_,WITH_TARGET_WORD_BITSIZE)
H A Dsim-n-core.h42 #define unsigned_M XCONCAT2(unsigned_,M)
44 #define T2H_M XCONCAT2(T2H_,M)
45 #define H2T_M XCONCAT2(H2T_,M)
46 #define SWAP_M XCONCAT2(SWAP_,M)
48 #define sim_core_read_aligned_N XCONCAT2(sim_core_read_aligned_,N)
49 #define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N)
50 #define sim_core_read_misaligned_N XCONCAT2(sim_core_read_misaligned_,N)
51 #define sim_core_write_aligned_N XCONCAT2(sim_core_write_aligned_,N)
52 #define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N)
53 #define sim_core_write_misaligned_N XCONCAT2(sim_core_write_misaligned
[all...]
/netbsd-current/external/gpl3/gdb/dist/sim/ppc/
H A Dcorefile-n.h26 #define unsigned_N XCONCAT2(unsigned_,N)
27 #define T2H_N XCONCAT2(T2H_,N)
28 #define H2T_N XCONCAT2(H2T_,N)
30 #define core_map_read_N XCONCAT2(core_map_read_,N)
31 #define core_map_write_N XCONCAT2(core_map_write_,N)
H A Dvm_n.h26 #define unsigned_N XCONCAT2(unsigned_,N)
27 #define T2H_N XCONCAT2(T2H_,N)
28 #define H2T_N XCONCAT2(H2T_,N)
29 #define vm_data_map_read_N XCONCAT2(vm_data_map_read_,N)
30 #define vm_data_map_write_N XCONCAT2(vm_data_map_write_,N)
45 val = XCONCAT2(core_map_read_,N)(map->read, ra, processor, cia);
94 XCONCAT2(core_map_write_,N)(map->write, ra, val, processor, cia);
/netbsd-current/external/gpl3/gdb.old/dist/sim/m32r/
H A Dm32r-sim.h49 XCONCAT2 (WANT_CPU,_h_cr_get_handler) (current_cpu, (regno))
51 XCONCAT2 (WANT_CPU,_h_cr_set_handler) (current_cpu, (regno), (val))
59 XCONCAT2 (WANT_CPU,_h_psw_get_handler) (current_cpu)
61 XCONCAT2 (WANT_CPU,_h_psw_set_handler) (current_cpu, (val))
78 XCONCAT2 (WANT_CPU,_h_accum_get_handler) (current_cpu)
80 XCONCAT2 (WANT_CPU,_h_accum_set_handler) (current_cpu, (val))
/netbsd-current/external/gpl3/gdb/dist/sim/m32r/
H A Dm32r-sim.h77 XCONCAT2 (WANT_CPU,_h_cr_get_handler) (current_cpu, (regno))
79 XCONCAT2 (WANT_CPU,_h_cr_set_handler) (current_cpu, (regno), (val))
91 XCONCAT2 (WANT_CPU,_h_psw_get_handler) (current_cpu)
93 XCONCAT2 (WANT_CPU,_h_psw_set_handler) (current_cpu, (val))
117 XCONCAT2 (WANT_CPU,_h_accum_get_handler) (current_cpu)
119 XCONCAT2 (WANT_CPU,_h_accum_set_handler) (current_cpu, (val))
/netbsd-current/external/gpl3/gcc.old/dist/include/
H A Dsymcat.h42 #define XCONCAT2(a,b) CONCAT2(a,b) macro
/netbsd-current/external/gpl3/gcc/dist/include/
H A Dsymcat.h42 #define XCONCAT2(a,b) CONCAT2(a,b) macro

Completed in 131 milliseconds

123456789