Searched refs:WDCTL_RST (Results 1 - 9 of 9) sorted by relevance

/netbsd-current/sys/dev/ic/
H A Dwdcreg.h68 #define WDCTL_RST 0x04 /* reset the controller */ macro
H A Dwdc.c1081 WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
H A Dahcisata_core.c898 cmd_tbl->cmdt_cfis[rhd_control] = WDCTL_RST | WDCTL_4BIT;
913 aprint_error("%s port %d: setting WDCTL_RST failed "
929 * Try to clear WDCTL_RST a few times before giving up.
953 aprint_error("%s port %d: clearing WDCTL_RST failed "
H A Dmvsata.c3357 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
/netbsd-current/sys/arch/mips/adm5120/dev/
H A Dwdc_extio.c128 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_RST);
/netbsd-current/sys/arch/dreamcast/dev/g1/
H A Dwdc_g1.c169 * and it doesn't reset itself by the WDCTL_RST in AUX_CTLR but requires
188 WDCTL_RST | WDCTL_4BIT | WDCTL_IDS);
/netbsd-current/sys/arch/mmeye/stand/boot/
H A Dwdc.c148 WDC_WRITE_CTLREG(chp, wd_aux_ctlr, WDCTL_RST | WDCTL_IDS);
/netbsd-current/sys/arch/cobalt/stand/boot/
H A Dwdc.c139 WDC_WRITE_CTLREG(chp, wd_aux_ctlr, WDCTL_RST | WDCTL_IDS);
/netbsd-current/sys/arch/bebox/stand/boot/
H A Dwdc.c182 WDC_WRITE_CTLREG(chp, wd_aux_ctlr, WDCTL_RST | WDCTL_IDS);

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