Searched refs:VTs (Results 1 - 25 of 47) sorted by relevance

12

/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFSelectionDAGInfo.cpp35 SDVTList VTs = DAG.getVTList(MVT::Other, MVT::Glue);
37 Dst = DAG.getNode(BPFISD::MEMCPY, dl, VTs, Chain, Dst, Src,
H A DBPFISelLowering.cpp618 SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Glue); local
621 return DAG.getNode(BPFISD::SELECT_CC, DL, VTs, Ops);
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZSelectionDAGInfo.cpp148 SDVTList VTs = DAG.getVTList(MVT::i32, MVT::Other); local
159 return DAG.getNode(SystemZISD::CLC_LOOP, DL, VTs, Chain, Src1, Src2,
162 return DAG.getNode(SystemZISD::CLC, DL, VTs, Chain, Src1, Src2,
200 SDVTList VTs = DAG.getVTList(PtrVT, MVT::i32, MVT::Other); local
206 SDValue End = DAG.getNode(SystemZISD::SEARCH_STRING, DL, VTs, Chain,
225 SDVTList VTs = DAG.getVTList(Dest.getValueType(), MVT::Other); local
226 SDValue EndDest = DAG.getNode(SystemZISD::STPCPY, DL, VTs, Chain, Dest, Src,
235 SDVTList VTs = DAG.getVTList(Src1.getValueType(), MVT::i32, MVT::Other); local
237 SDValue Unused = DAG.getNode(SystemZISD::STRCMP, DL, VTs, Chain, Src2, Src1,
254 SDVTList VTs local
[all...]
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMachineFunctionInfo.cpp38 SmallVector<EVT, 4> VTs; local
39 ComputeValueVTs(TLI, DL, Ty, VTs);
41 for (EVT VT : VTs) {
H A DWebAssemblyMCInstLower.cpp60 SmallVector<MVT, 1> VTs; local
61 computeLegalValueVTs(CurrentFunc, TM, Global->getValueType(), VTs);
62 if (VTs.size() != 1)
66 wasm::ValType Type = WebAssembly::toValType(VTs[0]);
H A DWebAssemblyAsmPrinter.cpp185 SmallVector<EVT, 1> VTs; local
187 VTs);
188 if (VTs.size() != 1 ||
189 TLI.getNumRegisters(GV->getParent()->getContext(), VTs[0]) != 1)
191 MVT VT = TLI.getRegisterType(GV->getParent()->getContext(), VTs[0]);
/netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h80 const EVT *VTs; member in struct:llvm::SDVTList
1056 SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
1057 : NodeType(Opc), ValueList(VTs.VTs), NumValues(VTs.NumVTs),
1061 assert(NumValues == VTs.NumVTs &&
1256 MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs,
1451 SDVTList VTs, EVT MemoryVT, MachineMemOperand *MMO)
1452 : MemSDNode(Opc, Order, dl, VTs, MemoryVT, MMO) {
1741 SDVTList VTs, int64_
1450 MemIntrinsicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemoryVT, MachineMemOperand *MMO) argument
1740 LifetimeSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl, SDVTList VTs, int64_t Size, int64_t Offset) argument
1775 PseudoProbeSDNode(unsigned Opcode, unsigned Order, const DebugLoc &Dl, SDVTList VTs, uint64_t Guid, uint64_t Index, uint32_t Attr) argument
2220 LSBaseSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, MachineMemOperand *MMO) argument
2254 LoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT, MachineMemOperand *MMO) argument
2282 StoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT, MachineMemOperand *MMO) argument
2314 MaskedLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, MachineMemOperand *MMO) argument
2356 MaskedLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, ISD::LoadExtType ETy, bool IsExpanding, EVT MemVT, MachineMemOperand *MMO) argument
2385 MaskedStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, ISD::MemIndexedMode AM, bool isTrunc, bool isCompressing, EVT MemVT, MachineMemOperand *MMO) argument
2421 MaskedGatherScatterSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexType IndexType) argument
2466 MaskedGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexType IndexType, ISD::LoadExtType ETy) argument
2491 MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexType IndexType, bool IsTrunc) argument
2522 MachineSDNode(unsigned Opc, unsigned Order, const DebugLoc &DL, SDVTList VTs) argument
[all...]
H A DSelectionDAG.h96 const EVT *VTs; member in class:llvm::SDVTListNode
104 FastID(ID), VTs(VT), NumVTs(Num) {
109 SDVTList result = {VTs, NumVTs};
395 SDVTList VTs, EVT MemoryVT,
397 return SDNodeTy(Opc, Order, DebugLoc(), VTs, MemoryVT, MMO)
606 SDVTList getVTList(ArrayRef<EVT> VTs);
746 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); local
748 return getNode(ISD::CopyToReg, dl, VTs,
755 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); local
757 return getNode(ISD::CopyToReg, dl, VTs,
394 getSyntheticNodeSubclassData(unsigned Opc, unsigned Order, SDVTList VTs, EVT MemoryVT, MachineMemOperand *MMO) argument
762 SDVTList VTs = getVTList(VT, MVT::Other); local
772 SDVTList VTs = getVTList(VT, MVT::Other, MVT::Glue); local
921 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); local
[all...]
/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp86 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { argument
87 SDVTList Res = {VTs, NumVTs};
562 ID.AddPointer(VTList.VTs);
5024 SDVTList VTs = getVTList(VT);
5028 AddNodeIDNode(ID, Opcode, VTs, Ops);
5035 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
5040 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
5839 "Extract subvector VTs must be vectors!");
5841 "Extract subvector VTs must have the same element type!");
5937 SDVTList VTs
[all...]
H A DScheduleDAGSDNodes.cpp140 static void CloneNodeWithValues(SDNode *N, SelectionDAG *DAG, ArrayRef<EVT> VTs, argument
146 SDVTList VTList = DAG->getVTList(VTs);
175 SmallVector<EVT, 4> VTs(N->values());
177 VTs.push_back(MVT::Glue);
179 CloneNodeWithValues(N, DAG, VTs, Glue);
H A DSelectionDAGISel.cpp2275 const EVT VTs[] = {MVT::Other, MVT::Glue}; local
2276 SDValue New = CurDAG->getNode(N->getOpcode(), DL, VTs, Ops);
3460 // If this is one of the compressed forms, get the number of VTs based
3468 SmallVector<EVT, 4> VTs;
3474 VTs.push_back(VT);
3478 VTs.push_back(MVT::Other);
3480 VTs.push_back(MVT::Glue);
3485 if (VTs.size() == 1)
3486 VTList = CurDAG->getVTList(VTs[0]);
3487 else if (VTs
[all...]
H A DLegalizeDAG.cpp2607 SDVTList VTs = DAG.getVTList(NewOutTy, MVT::Other);
2608 Operation = DAG.getNode(OpToUse, dl, VTs, N->getOperand(0), LegalOp);
2751 SDVTList VTs = DAG.getVTList(Node->getValueType(0), MVT::Other);
2753 ISD::ATOMIC_CMP_SWAP, dl, cast<AtomicSDNode>(Node)->getMemoryVT(), VTs,
2774 SDVTList VTs = DAG.getVTList(Node->getValueType(0), MVT::Other);
2776 ISD::ATOMIC_CMP_SWAP, dl, cast<AtomicSDNode>(Node)->getMemoryVT(), VTs,
3162 SDVTList VTs = DAG.getVTList(VT, VT);
3163 Tmp1 = DAG.getNode(ISD::FSINCOS, dl, VTs, Node->getOperand(0));
3263 SDVTList VTs = DAG.getVTList(VT, VT);
3264 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Nod
[all...]
/netbsd-current/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DCodeGenRegisters.h329 SmallVector<ValueTypeByHwMode, 4> VTs; member in class:llvm::CodeGenRegisterClass
352 ArrayRef<ValueTypeByHwMode> getValueTypes() const { return VTs; }
353 unsigned getNumValueTypes() const { return VTs.size(); }
356 return llvm::is_contained(VTs, VT);
360 if (VTNum < VTs.size())
361 return VTs[VTNum];
H A DCallingConvEmitter.cpp102 ListInit *VTs = Action->getValueAsListInit("VTs"); local
103 for (unsigned i = 0, e = VTs->size(); i != e; ++i) {
104 Record *VT = VTs->getElementAsRecord(i);
H A DDAGISelMatcher.cpp295 for (unsigned i = 0, e = VTs.size(); i != e; ++i)
296 OS << ' ' << getEnumName(VTs[i]);
318 return M->OpcodeName == OpcodeName && M->VTs == VTs &&
H A DDAGISelMatcher.h995 const SmallVector<MVT::SimpleValueType, 3> VTs; member in class:llvm::EmitNodeMatcherCommon
1011 VTs(vts.begin(), vts.end()), Operands(operands.begin(), operands.end()),
1017 unsigned getNumVTs() const { return VTs.size(); }
1019 assert(i < VTs.size());
1020 return VTs[i];
1029 const SmallVectorImpl<MVT::SimpleValueType> &getVTList() const { return VTs; }
H A DDAGISelMatcherOpt.cpp125 const SmallVectorImpl<MVT::SimpleValueType> &VTs = EN->getVTList(); local
128 VTs, Operands,
H A DRegisterInfoEmitter.cpp1242 for (const ValueTypeByHwMode &VVT : RC.VTs)
1291 std::vector<MVT::SimpleValueType> VTs; local
1292 for (const ValueTypeByHwMode &VVT : RC.VTs)
1293 VTs.push_back(VVT.get(M).SimpleTy);
1294 OS << ", VTLists+" << VTSeqs.get(VTs) << " }, // "
H A DCodeGenTarget.cpp358 if (!llvm::is_contained(SubClassWithSubReg->VTs, ValueTy))
421 llvm::append_range(LegalValueTypes, RC.VTs);
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp944 SDVTList VTs = CurDAG->getVTList(NarrowVT, MVT::Other); local
947 X86ISD::VBROADCAST_LOAD, dl, VTs, Ops, MemNode->getMemoryVT(),
1306 SDVTList VTs = CurDAG->getVTList(MVT::Other); local
1308 Store = CurDAG->getMemIntrinsicNode(X86ISD::FST, dl, VTs, Ops, MemVT,
1323 SDVTList VTs = CurDAG->getVTList(DstVT, MVT::Other); local
1326 X86ISD::FLD, dl, VTs, Ops, MemVT, MPI,
3737 SDVTList VTs = CurDAG->getVTList(NVT, MVT::i32, MVT::Other); local
3738 NewNode = CurDAG->getMachineNode(MOpc, dl, VTs, Ops);
3773 SDVTList VTs = CurDAG->getVTList(VT, MVT::i32, MVT::Other); local
3774 MachineSDNode *CNode = CurDAG->getMachineNode(MOpc, dl, VTs, Op
3783 SDVTList VTs = CurDAG->getVTList(VT, MVT::i32); local
3806 SDVTList VTs = CurDAG->getVTList(VT, MVT::i32, MVT::Other, MVT::Glue); local
3817 SDVTList VTs = CurDAG->getVTList(VT, MVT::i32, MVT::Glue); local
4105 SDVTList VTs = CurDAG->getVTList(NVT, MVT::Other); local
4488 SDVTList VTs = CurDAG->getVTList(MaskVT, MVT::Other); local
4938 SDVTList VTs = CurDAG->getVTList(NVT, MVT::i32, MVT::Other); local
5004 SDVTList VTs; local
5021 SDVTList VTs; local
5088 SDVTList VTs = CurDAG->getVTList(NVT, MVT::Other); local
5093 SDVTList VTs = CurDAG->getVTList(NVT, NVT, MVT::Other); local
5099 SDVTList VTs = CurDAG->getVTList(MVT::Other, MVT::Glue); local
5112 SDVTList VTs = CurDAG->getVTList(NVT); local
5116 SDVTList VTs = CurDAG->getVTList(NVT, NVT); local
5121 SDVTList VTs = CurDAG->getVTList(MVT::Glue); local
5242 SDVTList VTs = CurDAG->getVTList(MVT::i32, MVT::i32); local
5370 SDVTList VTs = CurDAG->getVTList(MVT::i16, MVT::Other); local
5671 SDVTList VTs = CurDAG->getVTList(MVT::i32, MVT::i32); local
5795 SDVTList VTs = CurDAG->getVTList(ValueVT, MaskVT, MVT::Other); local
5868 SDVTList VTs = CurDAG->getVTList(Mask.getValueType(), MVT::Other); local
[all...]
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1400 SDVTList VTs = DAG.getVTList(N->getValueType(0), MVT::i8); local
1401 SDValue Arith = DAG.getNode(BaseOp, DL, VTs, LHS, RHS);
1832 SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::i8); local
1835 SDValue New = DAG.getNode(Opcode, DL, VTs, Ops);
1881 SDVTList VTs = DAG.getVTList(Op0.getValueType(), MVT::i8); local
1882 SDValue Sub = DAG.getNode(M68kISD::SUB, DL, VTs, Op0, Op1);
1982 SDVTList VTs = DAG.getVTList(LHS.getValueType(), MVT::i32); local
1984 DAG.getNode(M68kISD::SUBX, DL, VTs, LHS, RHS, Carry.getValue(1));
2054 SDVTList VTs = DAG.getVTList(CmpOp0.getValueType(), MVT::i32); local
2057 DAG.getNode(M68kISD::SUB, DL, VTs,
2110 SDVTList VTs; local
2205 SDVTList VTs = DAG.getVTList(T1.getValueType(), MVT::Glue); local
2213 SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Glue); local
2306 SDVTList VTs; local
3320 SDVTList VTs = DAG.getVTList(VT, MVT::i32); local
3333 SDVTList VTs = DAG.getVTList(VT, MVT::i32); local
[all...]
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp1449 SmallVector<EVT, 16> VTs; local
1451 ComputePTXValueVTs(*this, DL, Ty, VTs, &Offsets);
1490 auto VectorInfo = VectorizePTXValueVTs(VTs, Offsets, ArgAlign);
1492 for (unsigned j = 0, je = VTs.size(); j != je; ++j) {
1501 EVT EltVT = VTs[j];
1504 assert(VTs.size() == 1 && "Scalar can't have multiple parts.");
1539 EVT TheStoreType = ExtendIntegerParam ? MVT::i32 : VTs[j];
1556 if (VTs.size() > 0)
1563 SmallVector<EVT, 16> VTs;
1567 ComputePTXValueVTs(*this, DL, PTy->getElementType(), VTs, local
1751 SmallVector<EVT, 16> VTs; local
2538 SmallVector<EVT, 16> VTs; local
2657 SmallVector<EVT, 16> VTs; local
[all...]
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAGHVX.cpp2191 SDVTList VTs = CurDAG->getVTList(MVT::Other);
2193 SDNode *Result = CurDAG->getMachineNode(Opcode, dl, VTs, Ops);
2228 SDVTList VTs = CurDAG->getVTList(MVT::Other);
2230 SDNode *Result = CurDAG->getMachineNode(Opcode, dl, VTs, Ops);
2245 SDVTList VTs = CurDAG->getVTList(MVT::v16i32, MVT::v64i1);
2246 Result = CurDAG->getMachineNode(Hexagon::V6_vaddcarry, SDLoc(N), VTs, Ops);
2252 SDVTList VTs = CurDAG->getVTList(MVT::v32i32, MVT::v128i1);
2253 Result = CurDAG->getMachineNode(Hexagon::V6_vaddcarry, SDLoc(N), VTs, Ops);
2259 SDVTList VTs = CurDAG->getVTList(MVT::v16i32, MVT::v64i1);
2260 Result = CurDAG->getMachineNode(Hexagon::V6_vsubcarry, SDLoc(N), VTs, Op
[all...]
H A DHexagonISelLowering.cpp727 SDVTList VTs = DAG.getVTList(MVT::i64, MVT::Other); local
728 return DAG.getNode(HexagonISD::READCYCLE, dl, VTs, Chain);
769 SDVTList VTs = DAG.getVTList(MVT::i32, MVT::Other); local
770 SDValue AA = DAG.getNode(HexagonISD::ALLOCA, dl, VTs, Chain, Size, AC);
3041 SDVTList VTs = Op.getNode()->getVTList();
3042 assert(VTs.NumVTs == 2);
3043 assert(VTs.VTs[1] == MVT::i1);
3054 SDValue Op = DAG.getNode(ISD::ADD, dl, VTs.VTs[
[all...]
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp225 SDVTList VTs = DAG.getVTList(MVT::i32, MVT::i32, MVT::Other, MVT::Glue); local
233 Dst = DAG.getNode(ARMISD::MEMCPY, dl, VTs, Chain, Dst, Src,

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