Searched refs:UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0__SHIFT (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h757 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0__SHIFT 0x00000000 macro
H A Duvd_6_0_sh_mask.h562 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0__SHIFT 0x0 macro
H A Duvd_7_0_sh_mask.h651 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0__SHIFT 0x0 macro
H A Duvd_5_0_sh_mask.h560 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0__SHIFT 0x0 macro
H A Duvd_4_2_sh_mask.h528 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0__SHIFT 0x0 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1171 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0__SHIFT 0x0 macro
H A Dvcn_2_0_0_sh_mask.h2677 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0__SHIFT 0x0 macro
H A Dvcn_2_5_sh_mask.h2681 #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0__SHIFT 0x0 macro

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