Searched refs:UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h755 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x00000000 macro
H A Duvd_6_0_sh_mask.h568 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x0 macro
H A Duvd_7_0_sh_mask.h660 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x0 macro
H A Duvd_5_0_sh_mask.h566 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x0 macro
H A Duvd_4_2_sh_mask.h534 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x0 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1180 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x0 macro
H A Dvcn_2_0_0_sh_mask.h2686 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x0 macro
H A Dvcn_2_5_sh_mask.h2690 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x0 macro

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