Searched refs:UVD_SUVD_CGC_GATE__IME_HEVC_MASK (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h480 #define UVD_SUVD_CGC_GATE__IME_HEVC_MASK 0x01000000L macro
H A Dvcn_2_0_0_sh_mask.h3235 #define UVD_SUVD_CGC_GATE__IME_HEVC_MASK 0x01000000L macro
H A Dvcn_2_5_sh_mask.h2109 #define UVD_SUVD_CGC_GATE__IME_HEVC_MASK 0x01000000L macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_vcn_v1_0.c546 | UVD_SUVD_CGC_GATE__IME_HEVC_MASK);
H A Damdgpu_vcn_v2_0.c539 | UVD_SUVD_CGC_GATE__IME_HEVC_MASK);
H A Damdgpu_vcn_v2_5.c629 | UVD_SUVD_CGC_GATE__IME_HEVC_MASK);

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