Searched refs:UVD_SUVD_CGC_CTRL__SMP_MODE_MASK (Results 1 - 12 of 12) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_uvd_v5_0.c692 UVD_SUVD_CGC_CTRL__SMP_MODE_MASK |
H A Damdgpu_vcn_v1_0.c552 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK
625 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK
H A Damdgpu_vcn_v2_0.c545 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK
652 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK
H A Damdgpu_vcn_v2_5.c635 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK
745 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK
H A Damdgpu_uvd_v6_0.c1348 UVD_SUVD_CGC_CTRL__SMP_MODE_MASK |
H A Damdgpu_uvd_v7_0.c1633 UVD_SUVD_CGC_CTRL__SMP_MODE_MASK |
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_6_0_sh_mask.h785 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK 0x4 macro
H A Duvd_7_0_sh_mask.h259 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK 0x00000004L macro
H A Duvd_5_0_sh_mask.h791 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK 0x4 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h551 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK 0x00000004L macro
H A Dvcn_2_0_0_sh_mask.h3310 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK 0x00000004L macro
H A Dvcn_2_5_sh_mask.h2184 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK 0x00000004L macro

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