Searched refs:UVD_SUVD_CGC_CTRL__SDB_MODE_MASK (Results 1 - 12 of 12) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_uvd_v5_0.c694 UVD_SUVD_CGC_CTRL__SDB_MODE_MASK);
H A Damdgpu_vcn_v1_0.c554 | UVD_SUVD_CGC_CTRL__SDB_MODE_MASK
627 | UVD_SUVD_CGC_CTRL__SDB_MODE_MASK
H A Damdgpu_vcn_v2_0.c547 | UVD_SUVD_CGC_CTRL__SDB_MODE_MASK
654 | UVD_SUVD_CGC_CTRL__SDB_MODE_MASK
H A Damdgpu_vcn_v2_5.c637 | UVD_SUVD_CGC_CTRL__SDB_MODE_MASK
747 | UVD_SUVD_CGC_CTRL__SDB_MODE_MASK
H A Damdgpu_uvd_v6_0.c1350 UVD_SUVD_CGC_CTRL__SDB_MODE_MASK);
H A Damdgpu_uvd_v7_0.c1635 UVD_SUVD_CGC_CTRL__SDB_MODE_MASK);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_6_0_sh_mask.h789 #define UVD_SUVD_CGC_CTRL__SDB_MODE_MASK 0x10 macro
H A Duvd_7_0_sh_mask.h261 #define UVD_SUVD_CGC_CTRL__SDB_MODE_MASK 0x00000010L macro
H A Duvd_5_0_sh_mask.h795 #define UVD_SUVD_CGC_CTRL__SDB_MODE_MASK 0x10 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h553 #define UVD_SUVD_CGC_CTRL__SDB_MODE_MASK 0x00000010L macro
H A Dvcn_2_0_0_sh_mask.h3312 #define UVD_SUVD_CGC_CTRL__SDB_MODE_MASK 0x00000010L macro
H A Dvcn_2_5_sh_mask.h2186 #define UVD_SUVD_CGC_CTRL__SDB_MODE_MASK 0x00000010L macro

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