Searched refs:UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER_MASK (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h735 #define UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER_MASK 0x00007FFFL macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1259 #define UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER_MASK 0x00007FFFL macro
H A Dvcn_2_0_0_sh_mask.h2874 #define UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER_MASK 0x00007FFFL macro
H A Dvcn_2_5_sh_mask.h2940 #define UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER_MASK 0x00007FFFL macro

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