Searched refs:UVD_RBC_RB_CNTL__RB_RPTR_WR_EN__SHIFT (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h605 #define UVD_RBC_RB_CNTL__RB_RPTR_WR_EN__SHIFT 0x0000001c macro
H A Duvd_6_0_sh_mask.h692 #define UVD_RBC_RB_CNTL__RB_RPTR_WR_EN__SHIFT 0x1c macro
H A Duvd_7_0_sh_mask.h742 #define UVD_RBC_RB_CNTL__RB_RPTR_WR_EN__SHIFT 0x1c macro
H A Duvd_5_0_sh_mask.h690 #define UVD_RBC_RB_CNTL__RB_RPTR_WR_EN__SHIFT 0x1c macro
H A Duvd_4_2_sh_mask.h628 #define UVD_RBC_RB_CNTL__RB_RPTR_WR_EN__SHIFT 0x1c macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1269 #define UVD_RBC_RB_CNTL__RB_RPTR_WR_EN__SHIFT 0x1c macro
H A Dvcn_2_0_0_sh_mask.h2887 #define UVD_RBC_RB_CNTL__RB_RPTR_WR_EN__SHIFT 0x1c macro
H A Dvcn_2_5_sh_mask.h2916 #define UVD_RBC_RB_CNTL__RB_RPTR_WR_EN__SHIFT 0x1c macro

Completed in 383 milliseconds