Searched refs:UVD_PGFSM_STATUS__UVDJ_PWR_STATUS__SHIFT (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_jpeg_v2_0.c271 (2 << UVD_PGFSM_STATUS__UVDJ_PWR_STATUS__SHIFT),
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_0_0_sh_mask.h1498 #define UVD_PGFSM_STATUS__UVDJ_PWR_STATUS__SHIFT 0x16 macro
H A Dvcn_2_5_sh_mask.h1501 #define UVD_PGFSM_STATUS__UVDJ_PWR_STATUS__SHIFT 0x16 macro

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