Searched refs:UVD_MPC_SET_MUXA1__VARA_7__SHIFT (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h513 #define UVD_MPC_SET_MUXA1__VARA_7__SHIFT 0x0000000c macro
H A Duvd_6_0_sh_mask.h532 #define UVD_MPC_SET_MUXA1__VARA_7__SHIFT 0xc macro
H A Duvd_7_0_sh_mask.h613 #define UVD_MPC_SET_MUXA1__VARA_7__SHIFT 0xc macro
H A Duvd_5_0_sh_mask.h530 #define UVD_MPC_SET_MUXA1__VARA_7__SHIFT 0xc macro
H A Duvd_4_2_sh_mask.h498 #define UVD_MPC_SET_MUXA1__VARA_7__SHIFT 0xc macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1120 #define UVD_MPC_SET_MUXA1__VARA_7__SHIFT 0xc macro
H A Dvcn_2_0_0_sh_mask.h2626 #define UVD_MPC_SET_MUXA1__VARA_7__SHIFT 0xc macro
H A Dvcn_2_5_sh_mask.h2861 #define UVD_MPC_SET_MUXA1__VARA_7__SHIFT 0xc macro

Completed in 317 milliseconds