Searched refs:UVD_LMI_VCPU_NC1_64BIT_BAR_LOW__BITS_31_0__SHIFT (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h673 #define UVD_LMI_VCPU_NC1_64BIT_BAR_LOW__BITS_31_0__SHIFT 0x0 macro
H A Dvcn_2_0_0_sh_mask.h3690 #define UVD_LMI_VCPU_NC1_64BIT_BAR_LOW__BITS_31_0__SHIFT 0x0 macro
H A Dvcn_2_5_sh_mask.h3067 #define UVD_LMI_VCPU_NC1_64BIT_BAR_LOW__BITS_31_0__SHIFT 0x0 macro

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