Searched refs:UVD_JRBC_SOFT_RESET__RESET__SHIFT (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h743 #define UVD_JRBC_SOFT_RESET__RESET__SHIFT 0x0 macro
H A Dvcn_2_0_0_sh_mask.h728 #define UVD_JRBC_SOFT_RESET__RESET__SHIFT 0x0 macro
H A Dvcn_2_5_sh_mask.h731 #define UVD_JRBC_SOFT_RESET__RESET__SHIFT 0x0 macro

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