Searched refs:UVD_CGC_CTRL__RBC_MODE_MASK (Results 1 - 14 of 14) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_vcn_v1_0.c508 | UVD_CGC_CTRL__RBC_MODE_MASK
609 | UVD_CGC_CTRL__RBC_MODE_MASK
667 UVD_CGC_CTRL__RBC_MODE_MASK |
H A Damdgpu_vcn_v2_0.c501 | UVD_CGC_CTRL__RBC_MODE_MASK
577 UVD_CGC_CTRL__RBC_MODE_MASK |
636 | UVD_CGC_CTRL__RBC_MODE_MASK
H A Damdgpu_vcn_v2_5.c591 | UVD_CGC_CTRL__RBC_MODE_MASK
668 UVD_CGC_CTRL__RBC_MODE_MASK |
730 | UVD_CGC_CTRL__RBC_MODE_MASK
H A Damdgpu_uvd_v5_0.c678 UVD_CGC_CTRL__RBC_MODE_MASK |
H A Damdgpu_uvd_v6_0.c1333 UVD_CGC_CTRL__RBC_MODE_MASK |
H A Damdgpu_uvd_v7_0.c1618 UVD_CGC_CTRL__RBC_MODE_MASK |
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h56 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x00100000L macro
H A Duvd_6_0_sh_mask.h271 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x100000 macro
H A Duvd_7_0_sh_mask.h455 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x00100000L macro
H A Duvd_5_0_sh_mask.h269 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x100000 macro
H A Duvd_4_2_sh_mask.h247 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x100000 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h948 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x00100000L macro
H A Dvcn_2_0_0_sh_mask.h1967 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x00100000L macro
H A Dvcn_2_5_sh_mask.h2016 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x00100000L macro

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