Searched refs:SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT (Results 1 - 7 of 7) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h303 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0x0000000a macro
H A Dsmu_7_0_0_sh_mask.h220 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro
H A Dsmu_7_1_1_sh_mask.h210 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro
H A Dsmu_7_1_3_sh_mask.h238 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro
H A Dsmu_7_1_2_sh_mask.h212 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro
H A Dsmu_7_1_0_sh_mask.h210 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro
H A Dsmu_7_0_1_sh_mask.h212 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro

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