Searched refs:SOFT_REGISTERS_TABLE_28__Reserved_0__SHIFT (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_1_1_sh_mask.h2754 #define SOFT_REGISTERS_TABLE_28__Reserved_0__SHIFT 0x0 macro
H A Dsmu_7_1_0_sh_mask.h3622 #define SOFT_REGISTERS_TABLE_28__Reserved_0__SHIFT 0x0 macro

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