Searched refs:SMU7_MAX_LEVELS_LINK (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
H A Dsmu7.h46 #define SMU7_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS // PCIe speed and number of lanes. macro
H A Dsmu7_discrete.h328 SMU7_Discrete_LinkLevel LinkLevel [SMU7_MAX_LEVELS_LINK];
/netbsd-current/sys/external/bsd/drm2/dist/drm/radeon/
H A Dsmu7.h46 #define SMU7_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS // PCIe speed and number of lanes. macro
H A Dsmu7_discrete.h327 SMU7_Discrete_LinkLevel LinkLevel [SMU7_MAX_LEVELS_LINK];
H A Dradeon_ci_dpm.c3416 SMU7_MAX_LEVELS_LINK);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_ci_smumgr.c2300 return SMU7_MAX_LEVELS_LINK;

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