Searched refs:SMC_RESP_1__SMC_RESP__SHIFT (Results 1 - 7 of 7) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h287 #define SMC_RESP_1__SMC_RESP__SHIFT 0x00000000 macro
H A Dsmu_7_0_0_sh_mask.h368 #define SMC_RESP_1__SMC_RESP__SHIFT 0x0 macro
H A Dsmu_7_1_1_sh_mask.h382 #define SMC_RESP_1__SMC_RESP__SHIFT 0x0 macro
H A Dsmu_7_1_3_sh_mask.h410 #define SMC_RESP_1__SMC_RESP__SHIFT 0x0 macro
H A Dsmu_7_1_2_sh_mask.h382 #define SMC_RESP_1__SMC_RESP__SHIFT 0x0 macro
H A Dsmu_7_1_0_sh_mask.h364 #define SMC_RESP_1__SMC_RESP__SHIFT 0x0 macro
H A Dsmu_7_0_1_sh_mask.h366 #define SMC_RESP_1__SMC_RESP__SHIFT 0x0 macro

Completed in 350 milliseconds