Searched refs:SMC_RESP_0__SMC_RESP_MASK (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_kv_smc.c45 if ((RREG32(mmSMC_RESP_0) & SMC_RESP_0__SMC_RESP_MASK) != 0)
49 tmp = RREG32(mmSMC_RESP_0) & SMC_RESP_0__SMC_RESP_MASK;
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h284 #define SMC_RESP_0__SMC_RESP_MASK 0xffffffffL macro
H A Dsmu_7_0_0_sh_mask.h363 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro
H A Dsmu_7_1_1_sh_mask.h377 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro
H A Dsmu_7_1_3_sh_mask.h405 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro
H A Dsmu_7_1_2_sh_mask.h377 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro
H A Dsmu_7_1_0_sh_mask.h359 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro
H A Dsmu_7_0_1_sh_mask.h361 #define SMC_RESP_0__SMC_RESP_MASK 0xffff macro

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