Searched refs:SI_CRTC0_REGISTER_OFFSET (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsi_enums.h127 #define SI_CRTC0_REGISTER_OFFSET 0 macro
H A Damdgpu_gmc_v6_0.c72 SI_CRTC0_REGISTER_OFFSET,
H A Damdgpu_dce_v6_0.c64 SI_CRTC0_REGISTER_OFFSET,
83 SI_CRTC0_REGISTER_OFFSET,
2830 reg_block = SI_CRTC0_REGISTER_OFFSET;
H A Dsid.h1996 #define SI_CRTC0_REGISTER_OFFSET 0 //(0x6df0 - 0x6df0)/4 macro

Completed in 100 milliseconds