| /netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 559 /// Returns true if RegB is a sub-register of RegA.
560 bool isSubRegister(MCRegister RegA, MCRegister RegB) const {
561 return isSuperRegister(RegB, RegA);
564 /// Returns true if RegB is a super-register of RegA.
565 bool isSuperRegister(MCRegister RegA, MCRegister RegB) const;
567 /// Returns true if RegB is a sub-register of RegA or if RegB == RegA.
568 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const {
569 return isSuperRegisterEq(RegB, RegA);
572 /// Returns true if RegB i
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 125 bool isProfitableToCommute(Register RegA, Register RegB, Register RegC,
131 bool isProfitableToConv3Addr(Register RegA, Register RegB);
135 Register RegB, unsigned Dist);
416 static bool regsAreCompatible(Register RegA, Register RegB, argument
418 if (RegA == RegB)
420 if (!RegA || !RegB)
422 return TRI->regsOverlap(RegA, RegB);
438 Register RegB,
478 MCRegister FromRegB = getMappedReg(RegB, SrcRegMap);
484 // -RegB i
437 isProfitableToCommute(Register RegA, Register RegB, Register RegC, MachineInstr *MI, unsigned Dist) argument
568 isProfitableToConv3Addr(Register RegA, Register RegB) argument
585 convertInstTo3Addr( MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi, Register RegA, Register RegB, unsigned Dist) argument
1368 Register RegB = 0; local
[all...] |
| H A D | ImplicitNullChecks.cpp | 293 Register RegB = MOB.getReg(); local
295 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef()))
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| H A D | TargetInstrInfo.cpp | 845 Register RegB = OpB.getReg(); local
852 if (Register::isVirtualRegister(RegB))
853 MRI.constrainRegClass(RegB, RC);
862 // recycling RegB because the MachineCombiner's computation of the critical
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| /netbsd-current/external/gpl3/gdb.old/dist/opcodes/ |
| H A D | i386-opc.h | 761 RegB, /* %bl / %bx / %ebx / %rbx */ enumerator in enum:operand_instance
|
| H A D | i386-gen.c | 732 INSTANCE (RegB),
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| /netbsd-current/external/gpl3/gdb/dist/opcodes/ |
| H A D | i386-opc.h | 806 RegB, /* %bl / %bx / %ebx / %rbx */ enumerator in enum:operand_instance
|
| H A D | i386-gen.c | 704 INSTANCE (RegB),
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| /netbsd-current/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | i386-opc.h | 801 RegB, /* %bl / %bx / %ebx / %rbx */ enumerator in enum:operand_instance
|
| H A D | i386-gen.c | 769 INSTANCE (RegB),
|
| /netbsd-current/external/gpl3/binutils/dist/opcodes/ |
| H A D | i386-opc.h | 831 RegB, /* %bl / %bx / %ebx / %rbx */ enumerator in enum:operand_instance
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| H A D | i386-gen.c | 524 INSTANCE (RegB),
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 2131 for (auto &RegB : UsesB) {
2133 if (RegA == RegB)
2138 if (RegB == *SubRegs)
2141 if (Register::isPhysicalRegister(RegB))
2142 for (MCSubRegIterator SubRegs(RegB, &HRI); SubRegs.isValid(); ++SubRegs)
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 517 Register RegB = Root.getOperand(AddOpIdx).getReg(); local
518 MachineInstr *Prev = MRI->getUniqueVRegDef(RegB);
865 RegA21, RegB; local
870 GetFMAInstrInfo(Root, RegM31, RegM32, RegB, KillM31, KillM32, KillB);
1020 .addReg(RegB, getKillRegState(RegB))
|