lib/CodeGen/TwoAddressInstructionPass.cpp

125   bool isProfitableToCommute(Register RegA, Register RegB, Register RegC,
131   bool isProfitableToConv3Addr(Register RegA, Register RegB);
135                           Register RegB, unsigned Dist);
416 static bool regsAreCompatible(Register RegA, Register RegB,
418   if (RegA == RegB)
420   if (!RegA || !RegB)
422   return TRI->regsOverlap(RegA, RegB);
438                                                       Register RegB,
478     MCRegister FromRegB = getMappedReg(RegB, SrcRegMap);
484     // -RegB is not tied to a register and RegC is compatible with RegA.
485     // -RegB is tied to the wrong physical register, but RegC is.
486     // -RegB is tied to the wrong physical register, and RegC isn't tied.
490     // -RegC is not tied to a register and RegB is compatible with RegA.
491     // -RegC is tied to the wrong physical register, but RegB is.
492     // -RegC is tied to the wrong physical register, and RegB isn't tied.
503   // If there is a use of RegB between its last def (could be livein) and this
506   if (!noUseAfterLastDef(RegB, Dist, LastDefB))
527   if (isRevCopyChain(RegB, RegA, MaxDataFlowEdge))
569                                                         Register RegB) {
576   MCRegister FromRegB = getMappedReg(RegB, SrcRegMap);
587     Register RegA, Register RegB, unsigned Dist) {
628   DstRegMap.erase(RegB);
1368   Register RegB = 0;
1377     // Grab RegB from the instruction because it may have changed if the
1379     RegB = MI->getOperand(SrcIdx).getReg();
1382     if (RegA == RegB) {
1391     assert(RegB.isVirtual() && "cannot make instruction into two-address form");
1408     MIB.addReg(RegB, 0, SubRegB);
1409     const TargetRegisterClass *RC = MRI->getRegClass(RegB);
1418         assert(TRI->getMatchingSuperReg(RegA, SubRegB, MRI->getRegClass(RegB))
1444     assert(MO.isReg() && MO.getReg() == RegB && MO.isUse() &&
1452     if (RegA.isVirtual() && RegB.isVirtual())
1461     SrcRegMap[RegA] = RegB;
1469         if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) {
1486         LV && LV->getVarInfo(RegB).removeKill(*MI)) {
1489       LV->addVirtualRegisterKilled(RegB, *PrevMI);
1494       LiveInterval &LI = LIS->getInterval(RegB);
1497       assert(I != LI.end() && "RegB must be live-in to use.");
1509       if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) {