/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/arm/ |
H A D | mul-overlap.l | 2 [^:]*:5: Rd and Rm should be different in mul 3 [^:]*:6: Rd and Rm should be different in mla
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64PBQPRegAlloc.h | 30 // parity(Rd) == parity(Ra). 32 bool addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra); 35 void addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra);
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H A D | AArch64PBQPRegAlloc.cpp | 158 bool A57ChainingConstraint::addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, argument 160 if (Rd == Ra) 165 if (Register::isPhysicalRegister(Rd) || Register::isPhysicalRegister(Ra)) { 166 LLVM_DEBUG(dbgs() << "Rd is a physical reg:" 167 << Register::isPhysicalRegister(Rd) << '\n'); 173 PBQPRAGraph::NodeId node1 = G.getMetadata().getNodeIdForVReg(Rd); 186 const LiveInterval &ld = LIs.getInterval(Rd); 242 void A57ChainingConstraint::addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, argument 248 if (Rd != Ra) { 250 << " to " << printReg(Rd, TR 362 Register Rd = MI.getOperand(0).getReg(); local 372 Register Rd = MI.getOperand(0).getReg(); local [all...] |
/netbsd-current/external/gpl3/gdb.old/dist/sim/arm/ |
H A D | thumbemu.c | 405 ARMword Rd = ntBITS (8, 11); local 413 if (Rd == 15) 422 // AND{S}<c>.W <Rd>,<Rn>,<Rm>{,<shift>} 440 case 0x51: // BIC{S}<c>.W <Rd>,<Rn>,<Rm>{,<shift>} 445 ARMword Rd = ntBITS (8, 11); local 454 * ainstr |= (Rd << 12); 465 ARMword Rd = ntBITS (8, 11); local 471 tASSERT (Rd != 15); 483 // LSL{S}<c>.W <Rd>,<Rm>,#<imm5> 487 // LSR{S}<c>.W <Rd>,<R 521 ARMword Rd = ntBITS (8, 11); local 545 ARMword Rd = ntBITS (8, 11); local 580 ARMword Rd = ntBITS (8, 11); local 618 ARMword Rd = ntBITS (8, 11); local 644 ARMword Rd = ntBITS (8, 11); local 684 ARMword Rd = ntBITS (8, 11); local 715 ARMword Rd = ntBITS (8, 11); local 734 ARMword Rd = ntBITS (8, 11); local 750 ARMword Rd = ntBITS (8, 11); local 766 ARMword Rd = ntBITS (8, 11); local 796 ARMword Rd = ntBITS (8, 11); local 845 ARMword Rd = ntBITS (8, 11); local 887 ARMword Rd = ntBITS (8, 11); local 929 ARMword Rd = ntBITS (8, 11); local 974 ARMword Rd = ntBITS (8, 11); local 1009 ARMword Rd = ntBITS (8, 11); local 1023 ARMword Rd = ntBITS (8, 11); local 1035 ARMword Rd = ntBITS (8, 11); local 1054 ARMword Rd = ntBITS (8, 11); local 1077 ARMword Rd = ntBITS (8, 11); local 1554 ARMword Rd = ntBITS (8, 11); local 1587 ARMword Rd = ntBITS (8, 11); local 1641 ARMword Rd = ntBITS (8, 11); local 1682 ARMword Rd = ntBITS (8, 11); local 1711 ARMword Rd = ntBITS (8, 11); local 1858 ARMword Rd = (tBIT (7) << 3) | tBITS (0, 2); local 1870 ARMword Rd = (tBIT(7) << 3) | tBITS (0, 2); local 2181 ARMword Rd = ((tinstr & 0x0007) >> 0); local [all...] |
/netbsd-current/external/gpl3/gdb/dist/sim/arm/ |
H A D | thumbemu.c | 408 ARMword Rd = ntBITS (8, 11); local 416 if (Rd == 15) 425 // AND{S}<c>.W <Rd>,<Rn>,<Rm>{,<shift>} 443 case 0x51: // BIC{S}<c>.W <Rd>,<Rn>,<Rm>{,<shift>} 448 ARMword Rd = ntBITS (8, 11); local 457 * ainstr |= (Rd << 12); 468 ARMword Rd = ntBITS (8, 11); local 474 tASSERT (Rd != 15); 486 // LSL{S}<c>.W <Rd>,<Rm>,#<imm5> 490 // LSR{S}<c>.W <Rd>,<R 524 ARMword Rd = ntBITS (8, 11); local 548 ARMword Rd = ntBITS (8, 11); local 583 ARMword Rd = ntBITS (8, 11); local 621 ARMword Rd = ntBITS (8, 11); local 647 ARMword Rd = ntBITS (8, 11); local 687 ARMword Rd = ntBITS (8, 11); local 718 ARMword Rd = ntBITS (8, 11); local 737 ARMword Rd = ntBITS (8, 11); local 753 ARMword Rd = ntBITS (8, 11); local 769 ARMword Rd = ntBITS (8, 11); local 799 ARMword Rd = ntBITS (8, 11); local 848 ARMword Rd = ntBITS (8, 11); local 890 ARMword Rd = ntBITS (8, 11); local 932 ARMword Rd = ntBITS (8, 11); local 977 ARMword Rd = ntBITS (8, 11); local 1012 ARMword Rd = ntBITS (8, 11); local 1026 ARMword Rd = ntBITS (8, 11); local 1038 ARMword Rd = ntBITS (8, 11); local 1057 ARMword Rd = ntBITS (8, 11); local 1080 ARMword Rd = ntBITS (8, 11); local 1557 ARMword Rd = ntBITS (8, 11); local 1590 ARMword Rd = ntBITS (8, 11); local 1644 ARMword Rd = ntBITS (8, 11); local 1685 ARMword Rd = ntBITS (8, 11); local 1714 ARMword Rd = ntBITS (8, 11); local 1895 ARMword Rd = (tBIT (7) << 3) | tBITS (0, 2); local 1907 ARMword Rd = (tBIT(7) << 3) | tBITS (0, 2); local 2219 ARMword Rd = ((tinstr & 0x0007) >> 0); local [all...] |
/netbsd-current/sys/arch/aarch64/aarch64/ |
H A D | disasm.c | 799 uint64_t Rn, uint64_t Rd, 804 if ((z_op != NULL) && (Rd == 31)) { 807 PRINTF("%s\t%s, ", op, SREGNAME(sf, Rd)); 812 if ((Rd == 31) || (Rn == 31)) { 842 uint64_t Rn, uint64_t Rd, 853 ZREGNAME(sf, Rd), 855 } else if ((znm_op != NULL) && (Rd == 31)) { 863 ZREGNAME(sf, Rd), 1031 uint64_t sf, uint64_t shift, uint64_t imm12, uint64_t Rn, uint64_t Rd, 1039 if (Rd 797 extendreg_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn, uint64_t sf, uint64_t Rm, uint64_t option, uint64_t imm3, uint64_t Rn, uint64_t Rd, const char *op, const char *z_op) argument 840 shiftreg_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn, uint64_t sf, uint64_t shift, uint64_t Rm, uint64_t imm6, uint64_t Rn, uint64_t Rd, const char *dnm_op, const char *dzm_op, const char *znm_op) argument 1030 addsub_imm_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn, uint64_t sf, uint64_t shift, uint64_t imm12, uint64_t Rn, uint64_t Rd, const char *op, const char *zop) argument 1056 csetsel_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn, uint64_t sf, uint64_t Rm, uint64_t cond, uint64_t Rn, uint64_t Rd, const char *op, const char *op2, const char *op3) argument 1609 crc32_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn, uint64_t sf, uint64_t Rm, uint64_t sz, uint64_t Rn, uint64_t Rd, const char *op) argument [all...] |
/netbsd-current/external/gpl3/gdb.old/dist/sim/testsuite/sim/h8300/ |
H A D | andl.s | 20 ;; and.l #xx:16,Rd 40 ;; and.l #xx:32,Rd 59 ;; and.l Rs,Rd
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H A D | orl.s | 20 ;; or.l #xx:16,Rd 40 ;; or.l #xx:32,Rd 59 ;; or.l Rs,Rd
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H A D | xorl.s | 20 ;; xor.l #xx:16,Rd 40 ;; xor.l #xx:32,Rd 59 ;; xor.l Rs,Rd
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H A D | daa.s | 19 ;; daa Rd
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H A D | addw.s | 26 ;; add.w #xx:3,Rd ; Immediate 3-bit operand 48 ;; add.w #xx:16,Rd 67 ;; add.w Rs,Rd
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H A D | subw.s | 19 ;; sub.w #xx:3,Rd ; Immediate 3-bit operand 39 ;; sub.w #xx:16,Rd 58 ;; sub.w Rs,Rd
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H A D | andw.s | 20 ;; and.w #xx:16,Rd 41 ;; and.w Rs,Rd
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H A D | orw.s | 20 ;; or.w #xx:16,Rd 41 ;; or.w Rs,Rd
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H A D | xorw.s | 20 ;; xor.w #xx:16,Rd 41 ;; xor.w Rs,Rd
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H A D | cmpw.s | 20 ;; cmp.w #xx:3,Rd ; Immediate 3-bit operand 51 ;; cmp.w #xx:16,Rd 77 ;; cmp.w #xx:16, Rd, where #xx < 0 (ie. #xx > 0x7fff). 96 ;; cmp.w Rs,Rd
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/netbsd-current/external/gpl3/gdb/dist/sim/testsuite/h8300/ |
H A D | andl.s | 20 ;; and.l #xx:16,Rd 40 ;; and.l #xx:32,Rd 59 ;; and.l Rs,Rd
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H A D | orl.s | 20 ;; or.l #xx:16,Rd 40 ;; or.l #xx:32,Rd 59 ;; or.l Rs,Rd
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H A D | xorl.s | 20 ;; xor.l #xx:16,Rd 40 ;; xor.l #xx:32,Rd 59 ;; xor.l Rs,Rd
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H A D | daa.s | 19 ;; daa Rd
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H A D | addw.s | 26 ;; add.w #xx:3,Rd ; Immediate 3-bit operand 48 ;; add.w #xx:16,Rd 67 ;; add.w Rs,Rd
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H A D | subw.s | 19 ;; sub.w #xx:3,Rd ; Immediate 3-bit operand 39 ;; sub.w #xx:16,Rd 58 ;; sub.w Rs,Rd
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H A D | andw.s | 20 ;; and.w #xx:16,Rd 41 ;; and.w Rs,Rd
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H A D | orw.s | 20 ;; or.w #xx:16,Rd 41 ;; or.w Rs,Rd
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H A D | xorw.s | 20 ;; xor.w #xx:16,Rd 41 ;; xor.w Rs,Rd
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