/netbsd-current/external/bsd/ntp/dist/libparse/ |
H A D | info_trimble.c | 58 { CMD_RDATAA, "CMD_RDATAA", "data channel A configuration (0x3D)", "trimble_channelA", RO }, 59 { CMD_RALMANAC, "CMD_RALMANAC", "almanac data for sat (0x40)", "gps_almanac", RO }, 60 { CMD_RCURTIME, "CMD_RCURTIME", "GPS time (0x41)", "gps_time", RO }, 61 { CMD_RSPOSXYZ, "CMD_RSPOSXYZ", "single precision XYZ position (0x42)", "gps_position(XYZ)", RO|DEF }, 62 { CMD_RVELOXYZ, "CMD_RVELOXYZ", "velocity fix (XYZ ECEF) (0x43)", "gps_velocity(XYZ)", RO|DEF }, 63 { CMD_RBEST4, "CMD_RBEST4", "best 4 satellite selection (0x44)", "trimble_best4", RO|DEF }, 64 { CMD_RVERSION, "CMD_RVERSION", "software version (0x45)", "trimble_version", RO|DEF }, 65 { CMD_RRECVHEALTH, "CMD_RRECVHEALTH", "receiver health (0x46)", "trimble_receiver_health", RO|DEF }, 66 { CMD_RSIGNALLV, "CMD_RSIGNALLV", "signal levels of all satellites (0x47)", "trimble_signal_levels", RO }, 67 { CMD_RMESSAGE, "CMD_RMESSAGE", "GPS system message (0x48)", "gps-message", RO|DE [all...] |
/netbsd-current/external/gpl3/gdb.old/dist/ld/testsuite/ld-powerpc/ |
H A D | aix-core-sec-1.s | 2 .csect foo[RO]
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/netbsd-current/external/bsd/ntp/dist/ntpd/ |
H A D | ntp_control.c | 344 { CS_STRATUM, RO, "stratum" }, /* 2 */ 345 { CS_PRECISION, RO, "precision" }, /* 3 */ 346 { CS_ROOTDELAY, RO, "rootdelay" }, /* 4 */ 347 { CS_ROOTDISPERSION, RO, "rootdisp" }, /* 5 */ 348 { CS_REFID, RO, "refid" }, /* 6 */ 349 { CS_REFTIME, RO, "reftime" }, /* 7 */ 350 { CS_POLL, RO, "tc" }, /* 8 */ 351 { CS_PEERID, RO, "peer" }, /* 9 */ 352 { CS_OFFSET, RO, "offset" }, /* 10 */ 353 { CS_DRIFT, RO, "frequenc [all...] |
H A D | refclock_neoclock4x.c | 741 tt = add_var(&out->kv_list, sizeof(tmpbuf)-1, RO|DEF); 744 tt = add_var(&out->kv_list, 40, RO|DEF); 746 tt = add_var(&out->kv_list, 40, RO|DEF); 748 tt = add_var(&out->kv_list, 40, RO|DEF); 750 tt = add_var(&out->kv_list, 40, RO|DEF); 757 tt = add_var(&out->kv_list, 40, RO|DEF); 764 tt = add_var(&out->kv_list, 40, RO|DEF); 772 tt = add_var(&out->kv_list, 80, RO|DEF); 774 tt = add_var(&out->kv_list, 40, RO|DEF); 776 tt = add_var(&out->kv_list, 80, RO|DE [all...] |
H A D | refclock_parse.c | 3561 tt = add_var(&out->kv_list, 80, RO); 3568 tt = add_var(&out->kv_list, 80, RO|DEF); 3572 start = tt = add_var(&out->kv_list, 128, RO|DEF); 3592 start = tt = add_var(&out->kv_list, 512, RO|DEF); 3626 start = tt = add_var(&out->kv_list, 80, RO|DEF); 3643 start = tt = add_var(&out->kv_list, LEN_STATES, RO|DEF); 3687 tt = add_var(&out->kv_list, 32, RO); 3690 tt = add_var(&out->kv_list, 80, RO); 3693 tt = add_var(&out->kv_list, 128, RO); 4348 set_var(&parse->kv, buffer, strlen(buffer)+1, RO|DE [all...] |
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/ppc/ |
H A D | test2xcoff32.s | 38 .csect _t.rw_[RO],4
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H A D | test1xcoff32.s | 33 .csect .crazy_table[RO] 80 .csect .crazy_table[RO]
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H A D | test1xcoff.asm | 33 .csect .crazy_table[RO] 80 .csect .crazy_table[RO]
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | CFIInstrInserter.cpp | 365 CSRSavedLocation RO = it->second; local 366 if (!RO.Reg && RO.Offset) { 368 MCCFIInstruction::createOffset(nullptr, Reg, *RO.Offset)); 369 } else if (RO.Reg && !RO.Offset) { 371 MCCFIInstruction::createRegister(nullptr, Reg, *RO.Reg)); 373 llvm_unreachable("RO.Reg and RO.Offset cannot both be valid/invalid");
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/MC/MCDisassembler/ |
H A D | MCDisassembler.cpp | 53 SMC_PCASE(RO, 1)
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/netbsd-current/external/bsd/pcc/dist/pcc/cc/cxxcom/ |
H A D | optim.c | 41 # define RO(p) p->n_right->n_op macro 181 if (RO(p) == ICON) { 223 if (RO(p) == ICON) { 289 if( RO(p) == o ){ 397 if (RO(p) != NE)
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/netbsd-current/sys/dev/microcode/aic7xxx/ |
H A D | aicasm_symbol.h | 69 RO = 0x01, enumerator in enum:__anon4
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H A D | aicasm_scan.l | 171 RW|RO|WO { 174 else if (strcmp(yytext, "RO") == 0) 175 yylval.value = RO;
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/netbsd-current/external/bsd/pcc/dist/pcc/cc/ccom/ |
H A D | optim.c | 45 # define RO(p) p->n_right->n_op macro 185 if (RO(p) == ICON) { 225 if (RO(p) == ICON) { 303 if( RO(p) == o ){ 443 if (RO(p) != NE)
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonEarlyIfConv.cpp | 820 const MachineOperand &RO = PN->getOperand(i), &BO = PN->getOperand(i+1); local 822 SR = RO.getReg(), SSR = RO.getSubReg(); 824 TR = RO.getReg(), TSR = RO.getSubReg(); 826 FR = RO.getReg(), FSR = RO.getSubReg();
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H A D | HexagonGenInsert.cpp | 387 OrderedRegisterList(const RegisterOrdering &RO) argument 388 : MaxSize(MaxORLSize), Ord(RO) {} 529 void buildOrderingMF(RegisterOrdering &RO) const; 530 void buildOrderingBT(RegisterOrdering &RB, RegisterOrdering &RO) const; 597 void HexagonGenInsert::buildOrderingMF(RegisterOrdering &RO) const { 617 RO.insert(std::make_pair(R, Index++)); 628 RegisterOrdering &RO) const { 642 RO.insert(std::make_pair(VRs[i], i));
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H A D | HexagonExpandCondsets.cpp | 230 void renameInRange(RegisterRef RO, RegisterRef RN, unsigned PredR, 906 /// In the range [First, Last], rename all references to the "old" register RO 909 void HexagonExpandCondsets::renameInRange(RegisterRef RO, RegisterRef RN, argument 923 if (!Op.isReg() || RO != RegisterRef(Op))
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86WinCOFFTargetStreamer.cpp | 351 for (RegSaveOffset RO : RegSaveOffsets) 352 FuncOS << printFPOReg(MRI, RO.Reg) << ' ' << CFAVar << ' ' << RO.Offset
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/netbsd-current/share/locale/ |
H A D | Makefile.locale | 11 NO NZ PL PT RO RS RU SE SI SK \ 88 TERRITORY_ro= RO
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/BinaryFormat/ |
H A D | XCOFF.cpp | 21 SMC_CASE(RO)
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/netbsd-current/external/gpl3/gcc.old/dist/libphobos/src/std/ |
H A D | file.d | 2457 version (StdDdoc) void symlink(RO, RL)(RO original, RL link) 2458 if ((isInputRange!RO && !isInfinite!RO && isSomeChar!(ElementEncodingType!RO) || 2459 isConvertibleToString!RO) && 2462 else version (Posix) void symlink(RO, RL)(RO original, RL link) 2463 if ((isInputRange!RO && !isInfinite!RO [all...] |
/netbsd-current/external/apache2/llvm/dist/clang/lib/CodeGen/ |
H A D | CodeGenFunction.cpp | 2517 CodeGenFunction::FormResolverCondition(const MultiVersionResolverOption &RO) { argument 2520 if (!RO.Conditions.Architecture.empty()) 2521 Condition = EmitX86CpuIs(RO.Conditions.Architecture); 2523 if (!RO.Conditions.Features.empty()) { 2524 llvm::Value *FeatureCond = EmitX86CpuSupports(RO.Conditions.Features); 2566 for (const MultiVersionResolverOption &RO : Options) { 2568 llvm::Value *Condition = FormResolverCondition(RO); 2572 assert(&RO == Options.end() - 1 && 2574 CreateMultiVersionResolverReturn(CGM, Resolver, Builder, RO.Function, 2581 CreateMultiVersionResolverReturn(CGM, Resolver, RetBuilder, RO [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/utils/TableGen/ |
H A D | AsmWriterEmitter.cpp | 894 const CodeGenInstAlias::ResultOperand &RO = CGA.ResultOperands[i]; local 896 switch (RO.Kind) { 898 const Record *Rec = RO.getRecord(); 899 StringRef ROName = RO.getName(); 982 MIOpNum += RO.getMINumOperands();
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/netbsd-current/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Core/ |
H A D | RegionStore.cpp | 116 const RegionOffset &RO = R->getAsOffset(); local 117 if (RO.hasSymbolicOffset()) 118 return BindingKey(cast<SubRegion>(R), cast<SubRegion>(RO.getRegion()), k); 120 return BindingKey(RO.getRegion(), RO.getOffset(), k); 1186 const RegionOffset &RO = baseR->getAsOffset(); local 1188 if (RO.hasSymbolicOffset()) { 1196 uint64_t LowerOffset = RO.getOffset();
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/netbsd-current/external/apache2/llvm/dist/llvm/tools/llvm-diff/ |
H A D | DifferenceEngine.cpp | 371 Value *LO = L->getOperand(I), *RO = R->getOperand(I); local 372 if (!equivalentAsOperands(LO, RO)) { 373 if (Complain) Engine.logf("operands %l and %r differ") << LO << RO; local
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