Searched refs:RCU_UC_EVENTS__irq31_sel__SHIFT (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h492 #define RCU_UC_EVENTS__irq31_sel__SHIFT 0x18 macro
H A Dsmu_7_1_1_sh_mask.h708 #define RCU_UC_EVENTS__irq31_sel__SHIFT 0x18 macro
H A Dsmu_7_1_3_sh_mask.h738 #define RCU_UC_EVENTS__irq31_sel__SHIFT 0x18 macro
H A Dsmu_7_1_2_sh_mask.h710 #define RCU_UC_EVENTS__irq31_sel__SHIFT 0x18 macro
H A Dsmu_7_1_0_sh_mask.h658 #define RCU_UC_EVENTS__irq31_sel__SHIFT 0x18 macro
H A Dsmu_7_0_1_sh_mask.h660 #define RCU_UC_EVENTS__irq31_sel__SHIFT 0x18 macro

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