Searched refs:RCC_DEV1_EPF0_STRAP2__STRAP_ARI_EN_DEV1_F0__SHIFT (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_sh_mask.h3653 #define RCC_DEV1_EPF0_STRAP2__STRAP_ARI_EN_DEV1_F0__SHIFT 0xf macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
H A Dnbio_2_3_sh_mask.h17923 #define RCC_DEV1_EPF0_STRAP2__STRAP_ARI_EN_DEV1_F0__SHIFT macro
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