Searched refs:PReg (Results 1 - 23 of 23) sorted by relevance

/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyReplacePhysRegs.cpp79 for (unsigned PReg = WebAssembly::NoRegister + 1;
80 PReg < WebAssembly::NUM_TARGET_REGS; ++PReg) {
82 if (PReg == WebAssembly::VALUE_STACK || PReg == WebAssembly::ARGUMENTS)
86 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(PReg);
88 for (auto I = MRI.reg_begin(PReg), E = MRI.reg_end(); I != E;) {
93 if (PReg == TRI.getFrameRegister(MF)) {
98 dbgs() << "replacing preg " << PReg << " with " << VReg << " ("
/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DRegUsageInfoCollector.cpp155 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
157 if (SavedRegs.test(PReg))
161 if (!MRI->def_empty(PReg)) {
162 for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI)
170 if (UsedPhysRegsMask.test(PReg))
171 SetRegAsDefined(PReg);
182 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PReg
[all...]
H A DRegisterUsageInfo.cpp95 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
96 if (MachineOperand::clobbersPhysReg(&(FPRMPair->second[0]), PReg))
97 OS << printReg(PReg, TRI) << " ";
H A DRegAllocPBQP.cpp627 MCRegister PReg(RawPRegOrder[I]);
628 if (MRI.isReserved(PReg))
632 if (!RegMaskOverlaps.empty() && !RegMaskOverlaps.test(PReg))
637 for (MCRegUnitIterator Units(PReg, &TRI); Units.isValid(); ++Units) {
647 VRegAllowed.push_back(PReg);
738 MCRegister PReg = G.getNodeMetadata(NId).getAllowedRegs()[AllocOpt - 1]; local
740 << TRI.getName(PReg) << "\n");
741 assert(PReg != 0 && "Invalid preg selected.");
742 VRM.assignVirt2Phys(VReg, PReg);
764 Register PReg local
[all...]
H A DCallingConvLower.cpp259 for (MCPhysReg PReg : RemainingRegs) {
260 Register VReg = MF.addLiveIn(PReg, RC);
261 Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
H A DMachineRegisterInfo.cpp452 /// getLiveInVirtReg - If PReg is a live-in physical register, return the
454 Register MachineRegisterInfo::getLiveInVirtReg(MCRegister PReg) const {
456 if (LI.first == PReg)
H A DMachineFunction.cpp634 Register MachineFunction::addLiveIn(MCRegister PReg, argument
637 Register VReg = MRI.getLiveInVirtReg(PReg);
646 assert((VRegRC == RC || (VRegRC->contains(PReg) &&
652 MRI.addLiveIn(PReg, VReg);
H A DMachineVerifier.cpp536 void MachineVerifier::report_context(MCPhysReg PReg) const {
537 errs() << "- p. register: " << printReg(PReg, TRI) << '\n';
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.h57 unsigned getNextPhysReg(unsigned PReg, unsigned Width) const;
58 unsigned getVirtRegFor(unsigned PReg) const;
H A DHexagonBitTracker.cpp1245 unsigned HexagonEvaluator::getNextPhysReg(unsigned PReg, unsigned Width) const {
1248 bool Is64 = DoubleRegsRegClass.contains(PReg);
1249 assert(PReg == 0 || Is64 || IntRegsRegClass.contains(PReg));
1257 if (PReg == 0)
1265 if (Phys32[Idx32] == PReg)
1272 if (Phys64[Idx64] == PReg)
1284 unsigned HexagonEvaluator::getVirtRegFor(unsigned PReg) const {
1286 if (P.first == PReg)
H A DHexagonBlockRanges.cpp280 unsigned PReg = *RC.begin(); local
281 MCSubRegIndexIterator I(PReg, &TRI);
H A DHexagonInstrInfo.cpp1284 Register PReg = Op1.getReg(); local
1293 .addReg(PReg, S)
1302 .addReg(PReg, PState)
1317 Register PReg = Op1.getReg(); local
1328 .addReg(PReg, S)
1340 .addReg(PReg, PState)
/netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h168 ForwardedRegister(Register VReg, MCPhysReg PReg, MVT VT) argument
169 : VReg(VReg), PReg(PReg), VT(VT) {}
171 MCPhysReg PReg; member in struct:llvm::ForwardedRegister
H A DMachineRegisterInfo.h966 /// getLiveInVirtReg - If PReg is a live-in physical register, return the
968 Register getLiveInVirtReg(MCRegister PReg) const;
H A DMachineFunction.h735 Register addLiveIn(MCRegister PReg, const TargetRegisterClass *RC);
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp503 MBB.addLiveIn(F.PReg);
504 MIRBuilder.buildCopy(Register(F.VReg), Register(F.PReg));
998 Register ForwardedReg = F.PReg;
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp1015 Register PReg = PMO.getReg(); local
1017 : TRI->getEncodingValue(PReg);
1026 PReg == getLoadStoreBaseOp(*MI).getReg())
1037 if (PReg == ARM::SP || PReg == ARM::PC)
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp3111 unsigned ScratchReg, SPReg, PReg, SPLimitOffset;
3116 PReg = X86::RBP;
3122 PReg = X86::EBP;
3137 .addReg(ScratchReg), PReg, false, SPLimitOffset);
3146 .addReg(ScratchReg), PReg, false, SPLimitOffset);
H A DX86ISelLowering.cpp4231 RegsToPass.push_back(std::make_pair(F.PReg, Val));
[all...]
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3225 auto PReg = mc2PseudoReg(Reg); local
3226 return isSGPR(PReg, TRI) && PReg != SGPR_NULL;
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1245 addLiveIn(MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC) argument
1248 MF.getRegInfo().addLiveIn(PReg, VReg);
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp650 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val));
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp5636 RegsToPass.emplace_back(F.PReg, Val);

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