Searched refs:PLL_TEST_CNTL__TST_REF_SEL__SHIFT (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h3548 #define PLL_TEST_CNTL__TST_REF_SEL__SHIFT 0x4 macro
H A Dsmu_7_1_1_sh_mask.h4166 #define PLL_TEST_CNTL__TST_REF_SEL__SHIFT 0x4 macro
H A Dsmu_7_1_3_sh_mask.h5192 #define PLL_TEST_CNTL__TST_REF_SEL__SHIFT 0x4 macro
H A Dsmu_7_1_2_sh_mask.h5288 #define PLL_TEST_CNTL__TST_REF_SEL__SHIFT 0x4 macro
H A Dsmu_7_1_0_sh_mask.h5178 #define PLL_TEST_CNTL__TST_REF_SEL__SHIFT 0x4 macro
H A Dsmu_7_0_1_sh_mask.h4988 #define PLL_TEST_CNTL__TST_REF_SEL__SHIFT 0x4 macro

Completed in 465 milliseconds