Searched refs:MATCH_AMOAND_W (Results 1 - 9 of 9) sorted by relevance

/netbsd-current/external/gpl3/binutils.old/dist/opcodes/
H A Driscv-opc.c398 {"amoand.w", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W, MASK_AMOAND_W | MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
409 {"amoand.w.aq", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W | MASK_AQ, MASK_AMOAND_W | MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
420 {"amoand.w.rl", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W | MASK_RL, MASK_AMOAND_W | MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
431 {"amoand.w.aqrl", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W | MASK_AQRL, MASK_AMOAND_W | MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
/netbsd-current/external/gpl3/gdb.old/dist/opcodes/
H A Driscv-opc.c400 {"amoand.w", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W, MASK_AMOAND_W | MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
411 {"amoand.w.aq", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W | MASK_AQ, MASK_AMOAND_W | MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
422 {"amoand.w.rl", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W | MASK_RL, MASK_AMOAND_W | MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
433 {"amoand.w.aqrl", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W | MASK_AQRL, MASK_AMOAND_W | MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
/netbsd-current/external/gpl3/binutils.old/dist/include/opcode/
H A Driscv-opc.h178 #define MATCH_AMOAND_W 0x6000202f macro
920 DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W)
/netbsd-current/external/gpl3/binutils/dist/opcodes/
H A Driscv-opc.c475 {"amoand.w", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W, MASK_AMOAND_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
486 {"amoand.w.aq", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W|MASK_AQ, MASK_AMOAND_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
497 {"amoand.w.rl", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W|MASK_RL, MASK_AMOAND_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
508 {"amoand.w.aqrl", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W|MASK_AQRL, MASK_AMOAND_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
/netbsd-current/external/gpl3/gdb/dist/opcodes/
H A Driscv-opc.c521 {"amoand.w", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W, MASK_AMOAND_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
532 {"amoand.w.aq", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W|MASK_AQ, MASK_AMOAND_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
543 {"amoand.w.rl", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W|MASK_RL, MASK_AMOAND_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
554 {"amoand.w.aqrl", 0, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOAND_W|MASK_AQRL, MASK_AMOAND_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE },
/netbsd-current/external/gpl3/gdb.old/dist/include/opcode/
H A Driscv-opc.h198 #define MATCH_AMOAND_W 0x6000202f macro
933 DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W)
/netbsd-current/external/gpl3/gdb/dist/sim/riscv/
H A Dsim-main.c879 case MATCH_AMOAND_W:
/netbsd-current/external/gpl3/binutils/dist/include/opcode/
H A Driscv-opc.h200 #define MATCH_AMOAND_W 0x6000202f macro
2610 DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W)
/netbsd-current/external/gpl3/gdb/dist/include/opcode/
H A Driscv-opc.h200 #define MATCH_AMOAND_W 0x6000202f macro
2873 DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W)

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