/netbsd-current/external/gpl3/gdb.old/dist/opcodes/ |
H A D | ia64-opc-m.c | 2138 #define LFETCHINCIMMED(x6,hnt,h) M0, OpX6aHintHlf (7, x6, hnt, h), {MR3, IMM9b}, POSTINC, 0, NULL macro 2142 {"lfetch", LFETCHINCIMMED (0x2c, 0, 0)}, 2144 {"lfetch.nt1", LFETCHINCIMMED (0x2c, 1, 0)}, 2146 {"lfetch.nt2", LFETCHINCIMMED (0x2c, 2, 0)}, 2148 {"lfetch.nta", LFETCHINCIMMED (0x2c, 3, 0)}, 2150 {"lfetch.d4", LFETCHINCIMMED (0x2c, 0, 1)}, 2151 {"lfetch.d5", LFETCHINCIMMED (0x2c, 1, 1)}, 2152 {"lfetch.d6", LFETCHINCIMMED (0x2c, 2, 1)}, 2153 {"lfetch.d7", LFETCHINCIMMED (0x2c, 3, 1)}, 2154 {"lfetch.excl", LFETCHINCIMMED ( 2191 #undef LFETCHINCIMMED macro [all...] |
/netbsd-current/external/gpl3/gdb/dist/opcodes/ |
H A D | ia64-opc-m.c | 2138 #define LFETCHINCIMMED(x6,hnt,h) M0, OpX6aHintHlf (7, x6, hnt, h), {MR3, IMM9b}, POSTINC, 0, NULL macro 2142 {"lfetch", LFETCHINCIMMED (0x2c, 0, 0)}, 2144 {"lfetch.nt1", LFETCHINCIMMED (0x2c, 1, 0)}, 2146 {"lfetch.nt2", LFETCHINCIMMED (0x2c, 2, 0)}, 2148 {"lfetch.nta", LFETCHINCIMMED (0x2c, 3, 0)}, 2150 {"lfetch.d4", LFETCHINCIMMED (0x2c, 0, 1)}, 2151 {"lfetch.d5", LFETCHINCIMMED (0x2c, 1, 1)}, 2152 {"lfetch.d6", LFETCHINCIMMED (0x2c, 2, 1)}, 2153 {"lfetch.d7", LFETCHINCIMMED (0x2c, 3, 1)}, 2154 {"lfetch.excl", LFETCHINCIMMED ( 2191 #undef LFETCHINCIMMED macro [all...] |
/netbsd-current/external/gpl3/binutils.old/dist/opcodes/ |
H A D | ia64-opc-m.c | 2138 #define LFETCHINCIMMED(x6,hnt,h) M0, OpX6aHintHlf (7, x6, hnt, h), {MR3, IMM9b}, POSTINC, 0, NULL macro 2142 {"lfetch", LFETCHINCIMMED (0x2c, 0, 0)}, 2144 {"lfetch.nt1", LFETCHINCIMMED (0x2c, 1, 0)}, 2146 {"lfetch.nt2", LFETCHINCIMMED (0x2c, 2, 0)}, 2148 {"lfetch.nta", LFETCHINCIMMED (0x2c, 3, 0)}, 2150 {"lfetch.d4", LFETCHINCIMMED (0x2c, 0, 1)}, 2151 {"lfetch.d5", LFETCHINCIMMED (0x2c, 1, 1)}, 2152 {"lfetch.d6", LFETCHINCIMMED (0x2c, 2, 1)}, 2153 {"lfetch.d7", LFETCHINCIMMED (0x2c, 3, 1)}, 2154 {"lfetch.excl", LFETCHINCIMMED ( 2191 #undef LFETCHINCIMMED macro [all...] |
/netbsd-current/external/gpl3/binutils/dist/opcodes/ |
H A D | ia64-opc-m.c | 2138 #define LFETCHINCIMMED(x6,hnt,h) M0, OpX6aHintHlf (7, x6, hnt, h), {MR3, IMM9b}, POSTINC, 0, NULL macro 2142 {"lfetch", LFETCHINCIMMED (0x2c, 0, 0)}, 2144 {"lfetch.nt1", LFETCHINCIMMED (0x2c, 1, 0)}, 2146 {"lfetch.nt2", LFETCHINCIMMED (0x2c, 2, 0)}, 2148 {"lfetch.nta", LFETCHINCIMMED (0x2c, 3, 0)}, 2150 {"lfetch.d4", LFETCHINCIMMED (0x2c, 0, 1)}, 2151 {"lfetch.d5", LFETCHINCIMMED (0x2c, 1, 1)}, 2152 {"lfetch.d6", LFETCHINCIMMED (0x2c, 2, 1)}, 2153 {"lfetch.d7", LFETCHINCIMMED (0x2c, 3, 1)}, 2154 {"lfetch.excl", LFETCHINCIMMED ( 2191 #undef LFETCHINCIMMED macro [all...] |