Searched refs:LCAC_MC0_CNTL__MC0_BLOCK_ID__SHIFT (Results 1 - 7 of 7) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_sh_mask.h2810 #define LCAC_MC0_CNTL__MC0_BLOCK_ID__SHIFT 0x11 macro
H A Dsmu_7_0_0_sh_mask.h3788 #define LCAC_MC0_CNTL__MC0_BLOCK_ID__SHIFT 0x11 macro
H A Dsmu_7_1_1_sh_mask.h4630 #define LCAC_MC0_CNTL__MC0_BLOCK_ID__SHIFT 0x11 macro
H A Dsmu_7_1_3_sh_mask.h5712 #define LCAC_MC0_CNTL__MC0_BLOCK_ID__SHIFT 0x11 macro
H A Dsmu_7_1_2_sh_mask.h5602 #define LCAC_MC0_CNTL__MC0_BLOCK_ID__SHIFT 0x11 macro
H A Dsmu_7_1_0_sh_mask.h5414 #define LCAC_MC0_CNTL__MC0_BLOCK_ID__SHIFT 0x11 macro
H A Dsmu_7_0_1_sh_mask.h5224 #define LCAC_MC0_CNTL__MC0_BLOCK_ID__SHIFT 0x11 macro

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